xr82c684 Exar Corporation, xr82c684 Datasheet - Page 24
xr82c684
Manufacturer Part Number
xr82c684
Description
Cmos Quad Channel Uart Quart
Manufacturer
Exar Corporation
Datasheet
1.XR82C684.pdf
(107 pages)
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Note: If this bit is configured to reflect the FFULLC
indicator, this bit will not be set (nor will produce an
interrupt request) if one or two characters are still
remaining in RHRC, following data reception. Hence, it is
possible that the last two characters in a string of data
(being received) could be lost due to this phenomenon.
Therefore, the user is advised to read RHRC until empty.
ISR2[0]: Channel C Transmitter Ready
IMR1 Bit Format
IMR2 Bit Format
Please note that the IMRs are Write Only Registers, and
can therefore not be read by the processor.
XR82C684
Input Port
Input Port
Change
Change
Bit 7
Bit 7
Delta Break
Delta Break
Bit 6
Bit 6
B
D
FFULLB
FFULLD
RXRDY/
RXRDY/
Bit 5
Bit 5
TXRDY D
TXRDYB
Bit 4
Bit 4
C.2 Interrupt Mask Registers (IMR1 and IMR2)
C.3 Masked Interrupt Status Register (MISR1 and
MISR2)
Counter
Counter
Ready
Ready
Bit 3
Bit 3
Delta Break
Delta Break
Bit 2
Bit 2
A
C
FFULLA
FFULLC
RXRDY/
RXRDY/
Bit 1
Bit 1
TXRDYC
TXRDYA
Bit 0
Bit 0