74LCX11MTCX Fairchild Semiconductor, 74LCX11MTCX Datasheet

IC GATE AND TRPLE 3INPUT 14TSSOP

74LCX11MTCX

Manufacturer Part Number
74LCX11MTCX
Description
IC GATE AND TRPLE 3INPUT 14TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LCXr
Datasheet

Specifications of 74LCX11MTCX

Logic Type
AND Gate
Number Of Inputs
3
Number Of Circuits
3
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Output Current
24mA
No. Of Inputs
3
Supply Voltage Range
2V To 3.6V
Logic Case Style
TSSOP
No. Of Pins
14
Operating Temperature Range
-40°C To +85°C
Termination Type
SMD
Rohs Compliant
Yes
Filter Terminals
SMD
Family Type
74LCX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LCX11MTCXTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LCX11MTCX
Manufacturer:
ON/安森美
Quantity:
20 000
Company:
Part Number:
74LCX11MTCX
Quantity:
100
©1995 Fairchild Semiconductor Corporation
74LCX11 Rev. 1.6.0
74LCX11
Low Voltage Triple 3-Input AND Gate with 5V
Tolerant Inputs
Features
Ordering Information
Note:
1. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
74LCX11M
74LCX11SJ
74LCX11BQX
74LCX11MTC
Order Number
5V tolerant inputs
2.3V–3.6V V
6.0ns t
Power down high impedance inputs and outputs
±24mA output drive (V
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds JEDEC 78 conditions
ESD performance:
– Human body model
– Machine model
Leadless DQFN package
All packages are lead free per JEDEC: J-STD-020B standard.
PD
max. (V
(1)
CC
specifications provided
CC
Package
Number
200V
MLP14A
MTC14
M14A
M14D
3.3V), 10µA I
CC
2000V
3.0V)
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
CC
max.
General Description
The LCX11 is a triple 3-input AND gate with buffered
outputs. LCX devices are designed for low voltage (2.5V
or 3.3V) operation with the added capability of interfac-
ing to a 5V signal environment.
The 74LCX11 is fabricated with advanced CMOS tech-
nology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Package Description
February 2008
www.fairchildsemi.com

Related parts for 74LCX11MTCX

74LCX11MTCX Summary of contents

Page 1

... DQFN package available in Tape and Reel only. Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1995 Fairchild Semiconductor Corporation 74LCX11 Rev. 1.6.0 General Description The LCX11 is a triple 3-input AND gate with buffered outputs ...

Page 2

... Connection Diagrams Pin Assignments for SOIC, SOP, and TSSOP (Top View) Pad Assignments for DQFN (Top Through View) Pin Description Pin Names Description Inputs Outputs n ©1995 Fairchild Semiconductor Corporation 74LCX11 Rev. 1.6.0 Logic Symbol IEEE/IEC Logic Diagram 2 www.fairchildsemi.com ...

Page 3

... CC V 2.7V–3. 2.3V–2. Free-Air Operating Temperature Input Edge Rate, V Note: 3. Unused inputs must be held HIGH or LOW. They may not float. ©1995 Fairchild Semiconductor Corporation 74LCX11 Rev. 1.6.0 Parameter (2) GND I (3) Parameter 0.8V–2.0V Rating –0.5V to +7.0V –0.5V to +7.0V – ...

Page 4

... Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW ( LOW-to-HIGH (t OSHL ©1995 Fairchild Semiconductor Corporation 74LCX11 Rev. 1.6.0 V (V) Conditions CC 2.3– ...

Page 5

... Dynamic Switching Characteristics Symbol Parameter V Quiet Output Dynamic Peak V OLP V Quiet Output Dynamic Valley V OLV Capacitance Symbol Parameter C Input Capacitance IN C Output Capacitance OUT C Power Dissipation Capacitance PD ©1995 Fairchild Semiconductor Corporation 74LCX11 Rev. 1.6.0 V (V) Conditions CC 3.3 C 50pF, V 3.3V 2.5 C 30pF, V 2.5V 3.3 C 50pF ...

Page 6

... Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t 3-STATE Output Low Enable and Disable Times for Logic Figure 2. Waveforms (Input Characteristics 1MHz, t ©1995 Fairchild Semiconductor Corporation 74LCX11 Rev. 1.6.0 (Generic for LCX Family) includes probe and jig capacitance) L ...

Page 7

... Schematic Diagram (Generic for LCX Family) ©1995 Fairchild Semiconductor Corporation 74LCX11 Rev. 1.6.0 7 www.fairchildsemi.com ...

Page 8

... BQX Leader (Start End) Trailer (Hub End) Tape Dimensions inches (millimeters) Reel Dimensions inches (millimeters) Tape Size A 12mm 13.0 (330.0) 0.059 (1.50) ©1995 Fairchild Semiconductor Corporation 74LCX11 Rev. 1.6.0 Tape Section Number of Cavities 125 (Typ.) Carrier 3000 75 (Typ 0.512 (13.00) 0.795 (20.20) ...

Page 9

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 10

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 11

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 12

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 13

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

Related keywords