wm8940gefl-v Wolfson Microelectronics plc, wm8940gefl-v Datasheet - Page 66

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wm8940gefl-v

Manufacturer Part Number
wm8940gefl-v
Description
Mono Codec With Speaker Driver
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM8940
w
POWER MANAGEMENT
VMID
Table 57 VMID Impedance Control
BIASEN
Table 58 BIASEN Control
ESTIMATED SUPPLY CURRENTS
Table 59 AVDD Supply Current
The analogue circuitry will not work when VMID is disabled (VMIDSEL[1:0] = 00b). The impedance
of the VMID resistor string, together with the decoupling capacitor on the VMID pin will determine the
start-up time of the VMID circuit.
When either the DAC or ADC are enabled it is estimated that approximately 4mA will be drawn from
DCVDD when fs=48kHz (This will be lower at lower sample rates). When the PLL is enabled an
additional 700 microamps will be drawn from DCVDD.
Table 59 shows the estimated 3.3V AVDD current drawn by various circuits, by register bit.
R1
Power
management 1
R1
Power
management 1
MONOEN
PLLEN
MICBEN
BIASEN
BUFIOEN
VMIDSEL
BOOSTEN
INPPGAEN
ADCEN
MONOEN
SPKPEN
SPKNEN
MONOMIXEN
SPKMIXEN
DACEN
REGISTER BIT
REGISTER
REGISTER
ADDRESS
ADDRESS
1:0
3
0.2mA
1.4mA (with clocks applied)
0.5mA
0.3mA
0.1mA
10K=>0.3mA, less than 0.1mA for 100k/500k
0.2mA
0.2mA
2.6mA
0.2mA
1mA from SPKVDD
1mA from SPKVDD
0.2mA
0.2mA
1.8mA
BIT
BIT
VMIDSEL 00
BIASEN
LABEL
LABEL
AVDD CURRENT (MILLIAMPS)
0
DEFAULT
DEFAULT
Reference string impedance to VMID pin
(determines startup time):
00=off (open circuit)
01=50kΩ
10=250kΩ
11=5kΩ (for fastest startup)
Analogue amplifier bias control
0=Disabled
1=Enabled
DESCRIPTION
DESCRIPTION
PD, Rev 4.2, April 2008
Production Data
66

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