wm8594seft-v Wolfson Microelectronics plc, wm8594seft-v Datasheet - Page 46

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wm8594seft-v

Manufacturer Part Number
wm8594seft-v
Description
24-bit 192khz 2vrms Multi-channel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM8594
w
POWERDOWN SEQUENCE
Power supplies can now be safely removed from the WM8594 if desired. Table 33 describes the
various bias control bits for power up/down control.
1.
2.
3.
4.
5.
6.
7.
8.
9.
Mute all PGAs:
Set up biases for power down mode:
Switch outputs to use fast bias instead of master bias:
Power down all WM8594 functions (ADC, DACs, PGAs etc.). The outputs are muted so
the write order is not important.
Power down VMID to allow the analogue outputs to ramp gently to ground in a pop-free
manner.
Wait until DACVMID has fully discharged. The time taken depends on system capacitance.
Clamp outputs to ground.
Power down outputs.
Disable remaining bias control bits.
MUTE_ALL=1
FAST_EN=1
VMID_SEL=01
BIAS_EN=1
BUFIO_EN=1
VMIDTOG=0
SOFT_ST=1
POBCTRL=1
VMID_SEL=00
Insert delay
APE_B=0
VOUTxL_EN=0
VOUTxR_EN=0
FAST_EN=0
POBCTRL=0
BIAS_EN=0
PD Rev 4.1 July 2008
Production Data
46

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