en5336 Enpirion, en5336 Datasheet - Page 8

• Manufacturer Part Number: en5336
• Description: 3a Voltage Mode Synchronous Buck Pwm Dc-dc Converter With Integrated Inductor External Output Voltage Programming
• Manufacturer: Enpirion

Rev 1.0 November 2006
Table 2. Recommended input capacitors.
Output Capacitor Selection
The EN5336QI has been optimized for use with
approximately 47µF of output capacitance. Low
ESR ceramic capacitors are required with X5R or
X7R rated dielectric formulation.
equivalent dielectric formulations must not be
used as these loose capacitance with frequency,
temperature and bias voltage.
Output ripple voltage is determined by the
aggregate output capacitor impedance. Output
impedance, denoted as Z, is comprised of
effective series resistance, ESR, and effective
series inductance, ESL:
Z = ESR + ESL.
Placing output capacitors in parallel reduces the
impedance and will hence result in lower ripple
voltage.
Typical ripple versus capacitance is given below:
Table 3. Recommended output capacitors.
©Enpirion 2006 all rights reserved, E&OE
Z
Output Capacitor
Total
1
Configuration
Description
Description
5 x 10 uF
1 x 47uF
10uF, 6.3V,
22uF, 6.3V,
47uF, 6.3V,
22uF, 10V,
47uF, 10V,
X7R, 1206
X5R, 1206
X5R, 1206
X7R, 1210
X5R, 1210
=
Z
1
1
+
Z
1
2
+
Murata
Taiyo Yuden
Murata
Taiyo Yuden
Taiyo Yuden
Taiyo Yuden
Taiyo Yuden
...
Murata
Murata
Murata
MFG
+
MFG
Typical Output Ripple (mVp-p)
Z
(as measured on EN5336QI
1
n
Evaluation Board)
GRM31CR71A476ME19L
GRM32ER71A226KE20L
GRM32ER71A476KE20L
GRM319R60J106KE19D
GRM31CR60J226KE19L
LMK325BJ226KM-T
LMK325BJ476KM-T
LMK316BJ106KD-T
LMK316BJ226KL-T
LMK316BJ476KL-T
20
10
P/N
P/N
Y5V or
Enable Operation
The ENABLE pin provides a means to shut down
the device, or enable normal operation. A logic
low will disable the converter and cause it to shut
down. A logic high will enable the converter into
normal operation.
asserted high, the device will undergo a normal
soft start.
Soft-Start Operation
Soft start is a method to reduce in-rush current
when the device is enabled. The output voltage
is ramped up slowly upon start-up.
rise time is controlled by choice of a soft-start
capacitor, which is placed between the SS pin
(pin 37) and the AGND pin (pin 29).
Rise Time: T
During start-up of the converter, the reference
voltage to the error amplifier is gradually
increased to its final level by an internal current
source of typically 10uA. Typical soft-start rise
time is 1mS to 3mS. Typical SS capacitor values
are in the range of 15nF to 30 nF.
POK Operation
The POK signal is an open drain signal from the
converter indicating the output voltage is within
the specified range. The POK signal will be a
logic high when the output voltage is above 90%
of V
trip-point. If the output voltage goes outside of
this range, the POK signal will be a logic low until
the output voltage has returned to within this
range. In the event of an over-voltage condition
the POK signal will go low and will remain in this
condition until the output voltage has dropped to
95% of the programmed output voltage before
returning to the high state.
NOTE: If no over voltage protection is used, POK
will remain “high” as long as V
90% of the nominal V
8
OUT
and below the user programmed OVP
R
= C
ss
* 80K Ω
When the ENABLE pin is
OUT
setting.
www.enpirion.com
OUT
remains above
EN5336QI
The output