en5311qi-e Enpirion, en5311qi-e Datasheet - Page 8

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en5311qi-e

Manufacturer Part Number
en5311qi-e
Description
1a Synchronous Buck Regulator With Integrated Inductor
Manufacturer
Enpirion
Datasheet

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ALTERA
0
startup.
maximum total capacitance on the output,
including the output filter capacitor, bulk and
decoupling capacitance, at the load, is given
as:
In VID Mode:
C
In external divider mode:
C
The nominal value for C
applications section for more details.
Over Current/Short Circuit Protection
The current limit function is achieved by
sensing the current flowing through a sense P-
MOSFET which is compared to a reference
current. When this level is exceeded the P-
FET is turned off and the N-FET is turned on,
pulling V
for a period of 1mS and then a normal soft start
is initiated. If the over current condition still
persists, this cycle will repeat in a “hick-up”
mode.
Under Voltage Lockout
Application Information
Output Voltage Select
To provide the highest degree of flexibility in
choosing output voltage, the EN5311QI uses a
3 pin VID, or Voltage ID, output voltage select
arrangement.
choose one of seven preset voltages, or to use
an external voltage divider.
output of the VID multiplexer sets the value for
the voltage reference DAC, which in turn is
connected to the non-inverting input of the
error amplifier. This allows the use of a single
feedback divider with constant loop gain and
©Enpirion 2009 all rights reserved, E&OE
03799
OUT_TOTAL_MAX
OUT_TOTAL_MAX
OUT
Assuming no-load at startup, the
low. This condition is maintained
= C
= 1.22x10
This allows the designer to
OUT_Filter
-3
OUT
/V
+ C
OUT
is 10uF. See the
OUT_BULK
Farads
Internally, the
= 700uF
11/24/2009
8
During initial power up an under voltage
lockout circuit will hold-off the switching
circuitry until the input voltage reaches a
sufficient level to insure proper operation. If
the voltage drops below the UVLO threshold
the lockout circuitry will again disable the
switching.
chattering between states.
Enable
The ENABLE pin provides a means to shut
down
operation. A logic low will disable the converter
and cause it to shut down. A logic high will
enable the converter into normal operation. In
shutdown mode, the device quiescent current
will be less than 1 uA.
NOTE: This pin must not be left floating.
Thermal Shutdown
When excessive power is dissipated in the
chip, the junction temperature rises. Once the
junction temperature exceeds the thermal
shutdown temperature the thermal shutdown
circuit turns off the converter output voltage
thus allowing the device to cool. When the
junction temperature decreases by 15C°, the
device will go through the normal startup
process.
optimum compensation, independent of the
output voltage selected.
Table 1 shows the various VS0-VS2 pin logic
states and the associated output voltage
levels. A logic “1” indicates a connection to V
or to a “high” logic voltage level. A logic “0”
indicates a connection to ground or to a “low”
logic voltage level. These pins can be either
hardwired to V
driven by standard logic levels. Logic low is
defined as V
as V
HIGH
the
≥ 1.4V. Any level between these two
Hysteresis is included to prevent
LOW
converter
IN
or GND or alternatively can be
≤ 0.4V. Logic high is defined
or
www.enpirion.com
enable
EN5311QI
normal
Rev:B
IN

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