a54sx16p Actel Corporation, a54sx16p Datasheet - Page 17

• Manufacturer Part Number: a54sx16p
• Description: Sx Family Fpgas
• Manufacturer: Actel Corporation

A54SX16P AC Specifications (3.3 V PCI Operation)
Table 1-9 •
Symbol Parameter
I
I
I
I
slew
slew
Notes:
1. Refer to the V/I curves in
2. Maximum current requirements must be met as drivers pull beyond the last step voltage. Equations defining these maximums
3. This parameter is to be interpreted as the cumulative edge rate across the specified range, rather than the instantaneous rate
OH(AC)
OL(AC)
CL
CH
one half of that specified here; i.e., half size output drivers may be used on these signals. This specification does not apply to
CLK and RST# which are system outputs. “Switching Current High” specification are not relevant to SERR#, INTA#, INTB#,
INTC#, and INTD# which are open drain outputs.
(C and D) are provided with the respective diagrams in
met by design. In order to facilitate component testing, a maximum current test point is defined for each side of the output
driver.
at any point within the transition range. The specified load (diagram below) is optional; i.e., the designer may elect to meet
this parameter with an unloaded output per the latest revision of the PCI Local Bus Specification. However, adherence to both
maximum and minimum parameters is required (the maximum is no longer simply a guideline). Rise slew rate does not apply
to open drain outputs.
R
F
Switching Current High
(Test Point)
Switching Current High
(Test Point)
Low Clamp Current
High Clamp Current
Output Rise Slew Rate
Output Fall Slew Rate
A54SX16P AC Specifications (3.3 V PCI Operation)
Figure 1-10 on page
3
3
Output
Buffer
Condition
0 < V
0.3V
0.7V
V
V
0.6V
V
–3 < V
–3 < V
0.2V
0.6V
0.18V
OUT
CC
OUT
> V
CC
CC
CC
CC
CC
OUT
= 0.7V
= 0.18V
CC
IN
IN
≤ V
< V
> V
to 0.6V
to 0.2V
OUT
≤ –1
≤ –1
≤ 0.3V
> V
OUT
OUT
OUT
1-14. Switching current characteristics for REQ# and GNT# are permitted to be
≥ 0.6V
CC
Pin
OUT
1 kΩ
CC
2
CC
CC
< 0.9V
< V
> 0.1V
2
CC
> 0
load
load
1
CC
CC
1, 2
1
1, 2
CC
Figure 1-10 on page
CC
1
1
v3.2
1/2 in. max.
10 pF
25 + (V
–25 + (V
–17.1 + (V
IN
26.7V
– V
–12V
16V
Min.
IN
OUT
1
1
1-14. The equation defined maxima should be
1 kΩ
+ 1)/0.015
CC
CC
OUT
CC
– 1)/0.015
– V
OUT
V
CC
)
EQ 1-3 on page 1-14
EQ 1-4 on page 1-14
–32V
38V
Max.
4
4
CC
CC
SX Family FPGAs
Units
V/ns
V/ns
mA
mA
mA
mA
mA
mA
mA
mA
1-13