ht82m72e Holtek Semiconductor Inc., ht82m72e Datasheet
ht82m72e
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ht82m72e Summary of contents
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... Block Diagram Rev. 1.20 HT82M72E/HT82M72A RF One Channel Mouse 8-bit OTP MCU 2.2V 0.1V Low battery detector with internal bit set detect the BAT-in input voltage Built-in 1MHz RC OSC source ...
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... Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. Rev. 1.20 HT82M72E/HT82M72A Description Bidirectional 8-bit input/output port. Each pin can be configured as a wake-up input by a configuration option. Software instructions determine if the pin is a CMOS output or Schmitt Trigger input ...
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... Prescaler Period t Watchdog Time-out Period (RC) WDT1 t External Reset Low Pulse Width RES Watchdog Time-out Period t configure (System Clock) Power AMP A.C. Characteristics Parameter Amp. Power Amp. Load Impedance Rev. 1.20 HT82M72E/HT82M72A Test Conditions Min. V Conditions DD 2 Define by option 2.7 No load 27MHz 3V SYS No load, system HALT 0 0. ...
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... Program Counter is incremented at the beginning of the T1 clock during which time a new instruction is fetched. The remaining T2~T4 clocks carry out the decoding and Rev. 1.20 HT82M72E/HT82M72A execution functions. In this way, one T1~T4 clock cycle forms one instruction cycle. Although the fetching and execution of instructions takes place in consecutive in- ...
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... PC9~PC8: Current Program Counter bits @7~@0: PCL bits #9~#0: Instruction code address bits S9~S0: Stack register bits Rev. 1.20 HT82M72E/HT82M72A naled by a return instruction, RET or RETI, the Program Counter is restored to its previous value from the stack. After a device reset, the Stack Pointer will point to the top of the stack. ...
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... After a device reset is initiated, the program will jump to this location and begin execu- tion. Program Memory Structure Rev. 1.20 HT82M72E/HT82M72A Location 008H This vector is used by the timer/event counter counter overflow occurs, the program will jump to this location and begin execution if the timer interrupt is enabled and the stack is not full ...
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... TBHP register bit1~bit0 when TBHP is enabled @7~@0: Table Pointer TBLP bits Rev. 1.20 HT82M72E/HT82M72A This will ensure that the first data read from the data ta- ble will be at the Program Memory address 306H or 6 locations after the start of the last page. Note that the ...
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... Data Memory. Rev. 1.20 HT82M72E/HT82M72A Special Purpose Data Memory This area of Data Memory is where registers, necessary for the correct operation of the microcontroller, are stored. Most of the registers are both readable and ...
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... However, it must be noted that when the Mem- ory Pointer is read, bit 7 will be read as high. ; setup size of block ; setup memory pointer with first RAM address ; clear the data at address defined increment memory pointer ; check if last memory location has been cleared 9 HT82M72E/HT82M72A May 22, 2008 ...
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... Once TBHP is enabled, the instruction TABRDC [m] reads the ROM data as defined by TBLP and TBHP value. Rev. 1.20 HT82M72E/HT82M72A Otherwise, the ROM code option TBHP is disabled, the instruction TABRDC [m] reads the ROM data as de- fined by TBLP and the current program counter bits. ...
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... All I/O ports have a designated regis- ter correspondingly labeled as PA, PB0~PB6 and Rev. 1.20 HT82M72E/HT82M72A PD0~PD1. These labeled I/O registers are mapped to specific addresses within the Data Memory as shown in the Data Memory table, which are used to transfer the appropriate output or input data on that port ...
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... However, it should be noted that the pro- gram will in fact only read the status of the output data latch and not the actual logic status of the output pin. Rev. 1.20 HT82M72E/HT82M72A Input/Output Ports Pin-shared Functions The flexibility of the microcontroller range is greatly en- hanced by the use of pins that have more than one func- tion ...
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... The provision of an internal 16-bit Timer/Event Counter Structure Rev. 1.20 HT82M72E/HT82M72A 16-stage prescaler to the timer clock circuitry gives added range to the timer. There are three registers related to the Timer/Event Counter, TMRL, TMRH and TMRC. The TMRL/TMRH register pair are the registers that contains the actual timing value ...
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... Timer/Event Counter Control Register Rev. 1.20 HT82M72E/HT82M72A Timer Control Register - TMRC The flexible features of the Holtek microcontroller Timer/Event Counters enable them to operate in three different modes, the options of which are determined by the contents of the Timer Control Register TMRC ...
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... In this way single shot pulse measurements can be easily made. It should be noted that in this mode the counter is controlled by logi- cal transitions on the PA2/TMR pin and not by the logic level. Event Counter Mode Timing Chart 15 HT82M72E/HT82M72A May 22, 2008 ...
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... As this is an external event and not syn- Rev. 1.20 HT82M72E/HT82M72A microcontroller will only see this external event when the next timer clock pulse arrives ...
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... The Program Counter will then be loaded with a new address which will be the value of the correspond- Rev. 1.20 HT82M72E/HT82M72A ing interrupt vector. The microcontroller will then fetch its next instruction from this interrupt vector. The instruc- tion at this vector will usually be a JMP statement which will jump to another section of program which is known as the interrupt service routine ...
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... By disabling the interrupt enable bit, the requested inter- rupt can be prevented from being serviced, however, once an interrupt request flag is set, it will remain in this Rev. 1.20 HT82M72E/HT82M72A condition in the interrupt control register until the corre- sponding interrupt is serviced or until the request flag is cleared by a software instruction. ...
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... RES pin remains low for an extended period to allow the power supply to stabilise. During this time delay, normal operation of the microcontroller will be Rev. 1.20 HT82M72E/HT82M72A inhibited. After the RES line reaches a certain voltage value, the reset delay time t is invoked to provide ...
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... SST WDT Time-out Reset during Power Down Timing Chart Rev. 1.20 HT82M72E/HT82M72A Reset Initial Conditions The different types of reset described affect the reset flags in different ways. These flags, known as PDF and TO are located in the status register and are controlled by various microcontroller operations, such as the Power Down function or Watchdog Timer ...
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... More information regarding the oscillator is located in Application Note HA0075E on the Holtek website. Watchdog Timer Oscillator The WDT oscillator is a fully self-contained free running on-chip RC oscillator with a typical period requiring no external components. When the device en- 21 HT82M72E/HT82M72A RES Reset WDT Time-out (HALT) (HALT)* 000H 000H ...
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... Care must also be taken with the loads, which are connected to I/O pins, which are setup as outputs. These should be placed in a Rev. 1.20 HT82M72E/HT82M72A condition in which minimum current is drawn or con- nected only to external circuits that do not draw current, such as other CMOS inputs. ...
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... WDT oscillator further divided by an internal 6-bit counter and a clearable single bit counter to give longer Rev. 1.20 HT82M72E/HT82M72A Watchdog time-outs. As the clear instruction only resets the last stage of the divider chain, for this reason the ac- tual division ratio and corresponding Watchdog Timer time-out can vary by a factor of two ...
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... Port A (12H Port B (14H Internal Register Port C Port (16H Note: The Internal Register data (PC5~PC7) will clear to zero after F/W read the register. Port D (18H Rev. 1.20 HT82M72E/HT82M72A 24 May 22, 2008 ...
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... DC/DC output current in normal state=50mA for 2.2V Make sure the battery=2.2V, the DC/DC is work prop- erly. Rev. 1.20 HT82M72E/HT82M72A Description The time interval, one seconds as a unit. When <7:0>=0H then the Hardware motion detector will only wake-up the MCU when it detects mouse movement or when there is a button change for the mouse mode. For the I/O mode, MCU will only be woken Port I INT when < ...
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... PA0~PA7 Wake-up by bit, wake-up or non-wake-up (PA4, PA5 both wake-up by falling or rising edge) 4 PA0~PA7 Pull-high by bit: pull-high or non-pull-high 5 PB0~PB6, PD0~PD1 Pull-high by nibble: pull-high or non-pull-high 6 LVR enable or disable 7 Power Amp. gain: half or full 8 System frequency: divide DC_DC output option: 2.8V, 3.1V, 3.4V, 3.8V, 4.1V or 4.6V 10 TBHP function enable or disable Application Circuits Rev. 1.20 HT82M72E/HT82M72A Options 26 May 22, 2008 ...
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... Within the Holtek microcontroller instruction set are a range of add and Rev. 1.20 HT82M72E/HT82M72A subtract instruction mnemonics to enable the necessary arithmetic to be carried out. Care must be taken to en- sure correct handling of carry and borrow data when re- sults exceed 255 for addition and less than 0 for subtraction ...
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... DECA [m] Decrement Data Memory with result in ACC DEC [m] Decrement Data Memory Rev. 1.20 HT82M72E/HT82M72A Other Operations In addition to the above functional instructions, a range of other instructions also exist such as the HALT in- struction for Power-down operations and instructions to control the operation of the Watchdog Timer for reliable program operations under extreme electric or electro- magnetic environments ...
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... For the CLR WDT1 and CLR WDT2 instructions the TO and PDF flags may be affected by the execution status. The TO and PDF flags are cleared after both CLR WDT1 and CLR WDT2 instructions are consecutively executed. Otherwise the TO and PDF flags remain unchanged. Rev. 1.20 HT82M72E/HT82M72A Description 29 Cycles Flag Affected ...
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... Operation ACC ACC AND x Affected flag(s) Z ANDM A,[m] Logical AND ACC to Data Memory Description Data in the specified Data Memory and the Accumulator perform a bitwise logical AND op- eration. The result is stored in the Data Memory. Operation [m] ACC AND [m] Affected flag(s) Z Rev. 1.20 HT82M72E/HT82M72A 30 May 22, 2008 ...
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... The TO, PDF flags and the WDT are all cleared. Note that this instruction works in conjunc- tion with CLR WDT1 and must be executed alternately with CLR WDT1 to have effect. Re- petitively executing this instruction without alternately executing CLR WDT1 will have no effect. Operation WDT cleared TO 0 PDF 0 Affected flag(s) TO, PDF Rev. 1.20 HT82M72E/HT82M72A addr 31 May 22, 2008 ...
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... This instruction stops the program execution and turns off the system clock. The contents of the Data Memory and registers are retained. The WDT and prescaler are cleared. The power down flag PDF is set and the WDT time-out flag TO is cleared. Operation TO 0 PDF 1 Affected flag(s) TO, PDF Rev. 1. HT82M72E/HT82M72A May 22, 2008 ...
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... No operation is performed. Execution continues with the next instruction. Operation No operation Affected flag(s) None OR A,[m] Logical OR Data Memory to ACC Description Data in the Accumulator and the specified Data Memory perform a bitwise logical OR oper- ation. The result is stored in the Accumulator. Operation ACC ACC OR [m] Affected flag(s) Z Rev. 1.20 HT82M72E/HT82M72A addr 33 May 22, 2008 ...
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... The contents of the specified Data Memory are rotated left by 1 bit with bit 7 rotated into bit 0. The rotated result is stored in the Accumulator and the contents of the Data Memory re- main unchanged. Operation ACC.(i+1) ACC.0 [m].7 Affected flag(s) None Rev. 1.20 HT82M72E/HT82M72A Stack Stack Stack [m]. 0~6) 34 May 22, 2008 ...
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... Data in the specified Data Memory and the carry flag are rotated right by 1 bit. Bit 0 re- places the Carry bit and the original carry flag is rotated into bit 7. The rotated result is stored in the Accumulator and the contents of the Data Memory remain unchanged. Operation ACC.i [m].(i+1 0~6) ACC [m].0 Affected flag(s) C Rev. 1.20 HT82M72E/HT82M72A [m]. 0~6) 35 May 22, 2008 ...
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... Set Data Memory Description Each bit of the specified Data Memory is set to 1. Operation [m] FFH Affected flag(s) None SET [m].i Set bit of Data Memory Description Bit i of the specified Data Memory is set to 1. Operation [m].i 1 Affected flag(s) None Rev. 1.20 [ HT82M72E/HT82M72A May 22, 2008 ...
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... The result is stored in the Accumulator. Note that if the result of subtraction is nega- tive, the C flag will be cleared to 0, otherwise if the result is positive or zero, the C flag will be set to 1. Operation ACC ACC Affected flag(s) OV, Z, AC, C Rev. 1.20 HT82M72E/HT82M72A 0 [m] [ May 22, 2008 ...
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... The low byte of the program code (last page) addressed by the table pointer (TBLP) is moved to the specified Data Memory and the high byte moved to TBLH. Operation [m] program code (low byte) TBLH program code (high byte) Affected flag(s) None Rev. 1.20 HT82M72E/HT82M72A [m].7 ~ [m].4 [m].7 ~ [m].4 [m].3 ~ [m].0 38 May 22, 2008 ...
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... The result is stored in the Data Memory. Operation [m] ACC XOR [m] Affected flag(s) Z XOR A,x Logical XOR immediate data to ACC Description Data in the Accumulator and the specified immediate data perform a bitwise logical XOR operation. The result is stored in the Accumulator. Operation ACC ACC XOR x Affected flag(s) Z Rev. 1.20 HT82M72E/HT82M72A 39 May 22, 2008 ...
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... Package Information 20-pin SOP (300mil) Outline Dimensions Symbol Rev. 1.20 HT82M72E/HT82M72A Dimensions in mil Min. Nom. 394 290 14 490 Max. 419 300 20 510 104 May 22, 2008 ...
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... SOP (300mil) Outline Dimensions Symbol Rev. 1.20 HT82M72E/HT82M72A Dimensions in mil Min. Nom. 394 290 14 697 Max. 419 300 20 713 104 May 22, 2008 ...
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... SSOP (150mil) Outline Dimensions Symbol Rev. 1.20 HT82M72E/HT82M72A Dimensions in mil Min. Nom. 228 150 8 386 Max. 244 157 12 394 May 22, 2008 ...
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... Key Slit Width T1 Space Between Flange T2 Reel Thickness SSOP 28S (150mil) Symbol Description A Reel Outer Diameter B Reel Inner Diameter C Spindle Hole Diameter D Key Slit Width T1 Space Between Flange T2 Reel Thickness Rev. 1.20 HT82M72E/HT82M72A Dimensions in mm 330 1 62 1.5 13+0.5 0.2 2 0.5 24.8+0.3 0.2 30.2 0.2 Dimensions in mm 330 1 62 1.5 13+0.5 0.2 2 0.5 16.8+0.3 0.2 22.2 0.2 43 May 22, 2008 ...
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... Carrier Tape Width P Cavity Pitch E Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K0 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev. 1.20 HT82M72E/HT82M72A Dimensions in mm 24+0.3 0.1 12 0.1 1.75 0.1 11.5 0.1 1.5+0.1 1.5+0.25 4 0.1 2 0.1 10.8 0.1 13.3 0.1 3.2 0.1 0.3 0.05 21.3 Dimensions 0.3 12 0.1 1.75 0.1 11.5 0.1 1.5+0.1 1.5+0.25 4 0.1 2 0.1 10.85 0.1 18 ...
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... Carrier Tape Width P Cavity Pitch E Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K0 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev. 1.20 HT82M72E/HT82M72A Dimensions 0.3 8 0.1 1.75 0.1 7.5 0.1 1.55+0.1 1.5+0.25 4 0.1 2 0.1 6.5 0.1 10.3 0.1 2.1 0.1 0.3 0.05 13.3 45 May 22, 2008 ...
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... Holtek s products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.20 HT82M72E/HT82M72A 46 May 22, 2008 ...