gal20v8b-15lr-883 Lattice Semiconductor Corp., gal20v8b-15lr-883 Datasheet

gal20v8b-15lr-883

Manufacturer Part Number

gal20v8b-15lr-883

Description

High Performance E2 Cmos Pld Generic Array Logic? Gal

Manufacturer

Lattice Semiconductor Corp.

Datasheet

1.GAL20V8B-15LR-883.pdf (6 pages)

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• HIGH PERFORMANCE E

• 50% REDUCTION IN POWER FROM BIPOLAR

• E

• EIGHT OUTPUT LOGIC MACROCELLS

• PRELOAD AND POWER-ON RESET OF ALL REGISTERS

• APPLICATIONS INCLUDE:

• ELECTRONIC SIGNATURE FOR IDENTIFICATION

The GAL20V8/883 is a high performance E

mable logic devices processed in full compliance to MIL-STD-

883. This military grade device combines a high performance

CMOS process with Electrically Erasable (E

nology to provide the highest speed/power performance available

in the 883 qualified PLD market.

The generic GAL architecture provides maximum design flexibil-

ity by allowing the Output Logic Macrocell (OLMC) to be config-

ured by the user. The GAL20V8/883 is capable of emulating all

standard 24-pin PAL

metric compatibility.

Unique test circuitry and reprogrammable cells allow complete

AC, DC, and functional testing during manufacture. Therefore,

Lattice Semiconductor delivers 100% field programmability and

functionality of all GAL products. In addition, 100 erase/write

cycles and data retention in excess of 20 years are specified.

to change without notice.

LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.

Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com

20v8mil_03

Features

Description

— 10 ns Maximum Propagation Delay

— Fmax = 62.5 MHz

— 7 ns Maximum from Clock Input to Data Output

— TTL Compatible 12 mA Outputs

— UltraMOS

— 75mA Typ Icc on Low Power Device

— Reconfigurable Logic

— Reprogrammable Cells

— 100% Tested/100% Yields

— High Speed Electrical Erasure (<100ms)

— 20 Year Data Retention

— Maximum Flexibility for Complex Logic Designs

— Programmable Output Polarity

— Also Emulates 24-pin PAL

— 100% Functional Testability

— DMA Control

— State Machine Control

— High Speed Graphics Processing

— Standard Logic Speed Upgrade

CELL TECHNOLOGY

Fuse Map/Parametric Compatibility

Advanced CMOS Technology

devices with full function/fuse map/para-

CMOS

Devices with Full Function/

TECHNOLOGY

) floating gate tech-

CMOS program-

Functional Block Diagram

Pin Configuration

I/CLK

GAL20V8

Top View

LCC

High Performance E

GAL20V8/883

I/O/Q

Generic Array Logic™

I/CLK

GND

OLMC

IMUX

CERDIP

November 2006

20V8

GAL

CMOS PLD

CLK

Vcc

I/O/Q

I/OE

I/O/Q

I/OE

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gal20v8b-15lr-883 Summary of contents

Page 1

... GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified. Copyright © 2006 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. ...

Page 2

... The leakage current is due to the internal pull-up on all pins. See Input Buffer section for more information. 2) One output at a time for a maximum duration of one second. Vout = 0.5V was selected to avoid test problems caused by tester ground degradation. Characterized but not 100% tested. 3) Typical values are at Vcc = 5V and °C Specifications GAL20V8B/883 Recommended Operating Conditions (1) CaseTemperature (T +1 ...

Page 3

... Calculated from fmax with internal feedback. Refer to fmax Descriptions section. 3) Refer to fmax Descriptions section. ° Capacitance ( 1.0 MHz) SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL20V8B/883 Over Recommended Operating Conditions MAXIMUM* UNITS -10 -15 -20 MIN. MAX. MIN. MAX. MIN. MAX. 2 ...

Page 4

Switching Waveforms INPUT or I/O FEEDBACK COMBINATIONAL OUTPUT Combinatorial Output INPUT or I/O FEEDBACK t dis COMBINATIONAL OUTPUT Input or I/O to Output Enable/Disable t wh CLK f 1/ max (w/o fb) Clock Width Specifications GAL20V8/883 INPUT or I/O FEEDBACK ...

Page 5

Descriptions CLK LOGIC REGISTER ARRAY max with External Feedback 1/( Note: fmax with external feedback is calculated from measured tsu and tco. CLK LOGIC REGISTER ARRAY max with No Feedback ...

Page 6

... Note: Lattice Semiconductor recognizes the trend in military device procurement towards using SMD compliant devices, as such, ordering by this number is recommended. Part Number Description GAL20V8B Device Name Speed (ns Low Power Power Specifications GAL20V8/883 ...

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