hn58x2408fpiage Renesas Electronics Corporation., hn58x2408fpiage Datasheet

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hn58x2408fpiage

Manufacturer Part Number
hn58x2408fpiage
Description
Memory>eeprom>serial Eeprom Two-wire Serial Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
HN58X2408FPIAG/HN58X2416FPIAG
HN58X2432FPIAG/HN58X2464FPIAG
Two-wire serial interface
8k EEPROM (1-kword × 8-bit)/16k EEPROM (2-kword × 8-bit)
32k EEPROM (4-kword × 8-bit)/64k EEPROM (8-kword × 8-bit)
Description
HN58X24xxFPIAG series are two-wire serial interface EEPROM (Electrically Erasable and
Programmable ROM). They realize high speed, low power consumption and a high level of reliability by
employing advanced MNOS memory technology and CMOS process and low voltage circuitry technology.
They also have a 32-byte page programming function to make their write operation faster.
Features
• Single supply: 1.8 V to 5.5 V
• Two-wire serial interface (I
• Clock frequency: 400 kHz
• Power dissipation:
• Automatic page write: 32-byte/page
• Write cycle time: 10 ms (2.7 V to 5.5 V)/15ms (1.8 V to 2.7 V)
• Endurance: 10
• Data retention: 10 Years
• Small size packages: SOP-8pin
• Shipping tape and reel: 2,500 IC/reel
• Temperature range: −40 to +85°C
• Lead free products.
Note: 1. I
Rev.3.00, Dec.21.2004, page 1 of 19
 Standby: 3 µA (max)
 Active (Read): 1 mA (max)
 Active (Write): 3 mA (max)
2
C is a trademark of Philips Corporation.
5
Cycles (Page write mode)
2
C
TM
serial bus*
1
)
REJ03C0134-0300
Dec.21.2004
Rev.3.00

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hn58x2408fpiage Summary of contents

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HN58X2408FPIAG/HN58X2416FPIAG HN58X2432FPIAG/HN58X2464FPIAG Two-wire serial interface 8k EEPROM (1-kword × 8-bit)/16k EEPROM (2-kword × 8-bit) 32k EEPROM (4-kword × 8-bit)/64k EEPROM (8-kword × 8-bit) Description HN58X24xxFPIAG series are two-wire serial interface EEPROM (Electrically Erasable and Programmable ROM). They realize high speed, ...

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... HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Ordering Information Type No. Internal organization Operating voltage Frequency Package HN58X2408FPIAGE 8k bit (1024 × 8-bit) HN58X2416FPIAGE 16k bit (2048 × 8-bit) HN58X2432FPIAGE 32k bit (4096 × 8-bit) HN58X2464FPIAGE 64k bit (8192 × 8-bit) Pin Arrangement V Pin Description Pin name SCL ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Block Diagram Control logic A0, A1, A2 SCL SDA Absolute Maximum Ratings Parameter Supply voltage relative Input voltage relative Operating temperature range* Storage temperature range Notes: 1. ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG (Ta = −40 to +85° Characteristics Parameter Symbol Min Input leakage current I LI Output leakage current I LO Standby V current Read V current I CC CC1 Write V current I CC CC2 ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG (Ta = −40 to +85° Characteristics Test Conditions • Input pules levels:  0.2 ×  0.8 × • Input rise and fall time: ≤ ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Timing Waveforms Bus Timing t F SCL t SU.STA t HD.STA SDA (in SDA (out) Write Cycle Timing SCL D0 in SDA Write data (Address (n)) Rev.3.00, Dec.21.2004, page 1/f SCL t t LOW ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Pin Function Serial Clock (SCL) The SCL pin is used to control serial input/output data timing. The SCL input is used to positive edge clock data into EEPROM device and negative edge clock data out of each device. Maximum ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Device Address (A0, A1, A2) Eight devices can be wired for one common data bus line as maximum. Device address pins are used to distinguish each device and device address pins should be connected to V code provided from ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Functional Description Start Condition A high-to-low transition of the SDA with the SCL high is needed in order to start read, write operation (See start condition and stop condition). Stop Condition A low-to-high transition of the SDA with the ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Acknowledge All addresses and data words are serially transmitted to and from in 8-bit words. The receiver sends a zero to acknowledge that it has received each word. This happens during ninth clock cycle. The transmitter keeps bus open ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Device Addressing The EEPROM device requires an 8-bit device address word following a start condition to enable the chip for a read or a write operation. The device address word consists of 4-bit device code, 3-bit device address code ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Write Operations Byte Write: A write operation requires an 8-bit device address word with R/W = “0”. Then the EEPROM sends acknowledgment "0" at the ninth clock cycle. After these, the 8kbit to 16kbit EEPROMs receive 8-bit memory address ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Page Write: The EEPROM is capable of the page write operation which allows any number of bytes bytes to be written in a single write cycle. The page write is the same sequence as the byte ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Acknowledge Polling: Acknowledge polling feature is used to show if the EEPROM internally-timed write cycle or not. This feature is initiated by the stop condition after inputting write data. This requires the 8-bit device address word ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Read Operation There are three read operations: current address read, random read, and sequential read. Read operations are initiated the same way as write operations with the exception of R/W = “1”. Current Address Read: The internal address counter ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Random Read: This is a read operation with defined read address. A random read requires a dummy write to set read address. The EEPROM receives a start condition, device address word(R/W=0) and memory address (8- bit for 8kbit to ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Sequential Read: Sequential reads are initiated by either a current address read or a random read. If the EEPROM receives acknowledgment “0” after 8-bit read data, the read address is incremented and the next 8-bit read data are coming ...

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HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Notes Data Protection at V On/Off CC When V is turned on or off, noise on the SCL and SDA inputs generated by external circuits (CPU, etc) CC may act as a trigger and turn the EEPROM to unintentional ...

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... HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG Package Dimensions HN58X2408FPIAGE/HN58X2416FPIAGE/HN58X2432FPIAGE/HN58X2464FPIAGE (FP-8DBV) 4.89 5.15 Max 0.69 Max 1.27 *0.40 ± 0.05 *Pd Plating Rev.3.00, Dec.21.2004, page 6.02 ± 0.18 1.06 0 ˚ – 8 ˚ + 0.289 0.60 – 0.194 0.10 0.25 M Package Code JEDEC JEITA Mass (reference value) Unit: mm FP-8DBV — — 0.08 g ...

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... Description  1.0 Mar. 30, 2001 Initial issue  2.00 Oct. 24, 2003 Change format issued by Renesas Technology Corp.  Deletion of Preliminary 2 Ordering Information Addition of HN58X2408FPIAGE, HN58X2416FPIAGE, HN58X2432FPIAGE, HN58X2464FPIAGE Package Dimensions 19 FP-8DB to FP-8DB, FP-8DBV 3.00 Dec.21.2004 2 Ordering Information Deletion of HN58X2408FPIAG, HN58X2416FPIAG, HN58X2432FPIAG, HN58X2464FPIAG 19 Package Dimensions ...

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Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...

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