hn58x2502fpie Renesas Electronics Corporation., hn58x2502fpie Datasheet
hn58x2502fpie
Related parts for hn58x2502fpie
hn58x2502fpie Summary of contents
Page 1
HN58X2502I HN58X2504I Serial Peripheral Interface 2k EEPROM (256-word × 8-bit) 4k EEPROM (512-word × 8-bit) Electrically Erasable and Programmable Read Only Memory Description HN58X25xxx Series is the Serial Peripheral Interface compatible (SPI) EEPROM (Electrically Erasable and Programmable ROM). It realizes ...
Page 2
... HN58X2502I/HN58X2504I Ordering Information Type No. Internal organization Operating voltage 2-kbit (256 × 8-bit) HN58X2502FPIE 4-kbit (512 × 8-bit) HN58X2504FPIE 2-kbit (256 × 8-bit) HN58X2502TIE 4-kbit (512 × 8-bit) HN58X2504TIE Pin Arrangement V Pin Description Pin name C Serial clock D Serial data input Q Serial data output ...
Page 3
HN58X2502I/HN58X2504I Block Diagram HOLD D Q Absolute Maximum Ratings Parameter Supply voltage relative Input voltage relative Operating temperature range* Storage temperature range Notes: 1. Including electrical ...
Page 4
HN58X2502I/HN58X2504I DC Characteristics Parameter Input leakage current Output leakage current V current Standby CC Active Output voltage Rev.2.00, Jul.05.2005, page Symbol Min Max I ...
Page 5
HN58X2502I/HN58X2504I AC Characteristics Test Conditions • Input pules levels: V × 0 V × 0 • Input rise and fall time: ≤ • Input and output timing reference ...
Page 6
HN58X2502I/HN58X2504I Parameter Clock frequency S active setup time S not active setup time S deselect time S active hold time S not active hold time Clock high time Clock low time Clock rise time Clock fall time Data in setup ...
Page 7
HN58X2502I/HN58X2504I Timing Waveforms Serial Input Timing S t CHSL C t DVCH D High Impedance Q Hold Timing HOLD Output Timing S C ADDR D LSB IN t CLQV t CLQX Q Rev.2.00, Jul.05.2005, page 7 ...
Page 8
HN58X2502I/HN58X2504I Pin Function Serial data output (Q) This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of serial clock (C). Serial data input (D) This input signal is ...
Page 9
HN58X2502I/HN58X2504I Functional Description Status Register The following figure shows the Status Register Format. The Status Register contains a number of status and control bits that can be read or set (as appropriate) by specific instructions. Status Register Format b7 1 ...
Page 10
HN58X2502I/HN58X2504I Write Enable (WREN): The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this is to send a Write Enable instruction to the device. As shown in the ...
Page 11
HN58X2502I/HN58X2504I Write Disable (WRDI): One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction to the device. As shown in the following figure, to send this instruction to the device, chip select (S) ...
Page 12
HN58X2502I/HN58X2504I Read Status Register (RDSR): The Read Status Register (RDSR) instruction allows the Status Register to be read. The Status Register may be read at any time, even while a Write or Write Status Register cycle is in progress. When ...
Page 13
HN58X2502I/HN58X2504I Write Status Register (WRSR): The Write Status Register (WRSR) instruction allows new values to be written to the Status Register. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable ...
Page 14
HN58X2502I/HN58X2504I Read from Memory Array (READ): As shown in the following figure, to send this instruction to the device, chip select (S) is first driven low. The bits of the instruction byte and the address bytes are then shifted in, ...
Page 15
HN58X2502I/HN58X2504I Write to Memory Array (WRITE): As shown in the following figure, to send this instruction to the device, chip select (S) is first driven low. The bits of the instruction byte, address byte, and at least one data byte ...
Page 16
HN58X2502I/HN58X2504I Byte Write (WRITE) Sequence (Page ...
Page 17
HN58X2502I/HN58X2504I Data Protect The Block Protect bits (BP1, BP0) define the area of memory that is protected against the execution of write cycle, as summarized in the following table. When Write Protect (W) is driven low, write to memory array ...
Page 18
HN58X2502I/HN58X2504I Notes Data Protection at V On/Off CC is turned on or off, noise on S inputs generated by external circuits (CPU, etc) may act as a trigger and turn When V CC the EEPROM to unintentional program mode. To ...
Page 19
... HN58X2502I/HN58X2504I Package Dimensions HN58X2502FPIE/HN58X2504FPIE (PRSP0008DF-B / Previous Code: FP-8DBV) JEITA Package Code RENESAS Code P-SOP8-3.9x4.89-1.27 PRSP0008DF Index mark Rev.2.00, Jul.05.2005, page Previous Code MASS[Typ.] FP-8DBV 0.08g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. ...
Page 20
HN58X2502I/HN58X2504I HN58X2502TIE/HN58X2504TIE (PTSP0008JC-B / Previous Code: TTP-8DAV) JEITA Package Code RENESAS Code P-TSSOP8-4.4x3-0.65 PTSP0008JC Index mark Rev.2.00, Jul.05.2005, page Previous Code MASS[Typ.] TTP-8DAV 0.034g ...
Page 21
... Contents of Modification Initial issue Deletion of Preliminary Deletion of Package: SON (TNP-8DA) Ordering Information Deletion of HN58X2502FPI, HN58X2504FPI, HN58X2502TI, HN58X2504TI Addition of HN58X2502FPIE, HN58X2504FPIE, HN58X2502TIE, HN58X2504TIE Package Dimensions: Change of Dimensions FP-8DB to FP-8DBV TTP-8D to TTP-8DAV Description and Features Change Serial Peripheral Interface for Serial Peripheral Interface compatible ...
Page 22
Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...