ak4673 AKM Semiconductor, Inc., ak4673 Datasheet - Page 28

• Manufacturer Part Number: ak4673
• Description: Stereo Codec With Mic/hp-amp And Touch Screen Controller
• Manufacturer: AKM Semiconductor, Inc.

■
When PMPLL bit is “1”, a fully integrated analog phase locked loop (PLL) generates a clock that is selected by the
PLL3-0 and FS3-0 bits. The PLL lock time, when the AK4673 is supplied stable clocks after PLL is powered-up (PMPLL
bit = “0” → “1”) or sampling frequency changes is shown in
1) Setting of PLL Mode
2) Setting of sampling frequency in PLL Mode
When PLL reference clock input is MCKI pin, the sampling frequency is selected by FS3-0 bits as defined in
MS0670-E-01
Others
Mode
12
13
14
15
PLL Mode (AIN3 bit = “0”, PMPLL bit = “1”)
0
2
3
4
5
6
7
8
Table 6. Setting of Sampling Frequency at PMPLL bit = “1” (Reference Clock = MCKI pin) (N/A: Not available)
PLL3
Others
Mode
bit
0
0
0
0
0
0
0
1
1
1
1
1
10
11
14
15
0
1
2
3
4
5
6
7
Others
PLL2
bit
0
0
0
1
1
1
1
0
1
1
1
1
Table 5. Setting of PLL Mode (*fs: Sampling Frequency, N/A: Not available)
FS3 bit
0
0
0
0
0
0
0
0
1
1
1
1
PLL1
bit
1
1
0
0
0
1
1
0
0
0
1
1
PLL0
bit
0
0
1
0
1
0
1
0
0
1
0
1
FS2 bit
0
0
0
0
1
1
1
1
0
0
1
1
Clock Input Pin
PLL Reference
Others
LRCK pin
MCKI pin
MCKI pin
MCKI pin
MCKI pin
MCKI pin
MCKI pin
MCKI pin
MCKI pin
MCKI pin
BICK pin
BICK pin
N/A
FS1 bit
0
0
1
1
0
0
1
1
1
1
1
1
- 28 -
Table
11.2896MHz
12.288MHz
Frequency
19.2MHz
13.5MHz
12MHz
24MHz
27MHz
13MHz
26MHz
Input
32fs
64fs
FS0 bit
1fs
5. When AIN3 bit = “1”, the PLL is not available.
0
1
0
1
0
1
0
1
0
1
0
1
Sampling Frequency
R[Ω]
6.8k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
R and C of
VCOC pin
11.025kHz
22.05kHz
7.35kHz
14.7kHz
29.4kHz
44.1kHz
12kHz
16kHz
24kHz
32kHz
48kHz
8kHz
N/A
220n
220n
220n
C[F]
4.7n
4.7n
4.7n
4.7n
4.7n
4.7n
4.7n
10n
10n
10n
10n
PLL Lock
160ms
(max)
40ms
40ms
40ms
40ms
40ms
40ms
40ms
60ms
60ms
Time
2ms
4ms
2ms
4ms
(default)
[AK4673]
Table
(default)
2007/10
6.