ak7746 ETC-unknow, ak7746 Datasheet - Page 54

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ak7746

Manufacturer Part Number
ak7746
Description
Audio With 5-channel 24-bit Input
Manufacturer
ETC-unknow
Datasheet

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c) External conditional jump code rewrite (during RUN phase)
phases, and input data is set to the specified register at the rising edge of LRCLK. When all data has been transferred, the RDY pin goes
to "L". Upon completion of writing, it goes to "H". A jump command will be executed if there is any one agreement between each bit
of the 8-bit external condition code and "1"of each bit of the IFCON field. A write operation from the microcomputer is disabled until
RDY goes to "H".
Note: The LRCLK phase is inverted in the I
[MS0369-E00]
[ASAHI KASEI]
S_RESET
LRCLK
SCLK
SO
RDY
RQ
SI
Two data bytes are used to write an external conditional jump code. Data can be input during both the reset and operation
Data transfer procedure
Command code
Code data
11000100
Fig.8-29 External condition jump write timing (during RUN phase)
C4h ( 1 1 0 0 0 1 0 0 )
D7 *** D0
(D7 . . . . . D0)
2
S-compatible state.
max 2LRCLK
- 54 -
L ch
max0.25LRCLK
R ch
[AK7746]
2004/12

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