m21353 Mindspeed Technologies, m21353 Datasheet
m21353
Related parts for m21353
m21353 Summary of contents
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... The device features twelve independent, programmable equalizers that equalize data at rates up to 4.25 Gbps. Control of the M21353 is provided through an I control interface. The M21353 can also self-configure from an external EEPROM without the need for a host processor. For compatibility with PCI-Express and S-ATA/SAS systems, the M21353 is designed with an electrical idle pass-through function to drive the differential output to the common mode level during OOB signaling ...
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... Ordering Information Part Number M21353G-13 The M21353 is RoHS compliant. Refer to http://www.mindspeed.com/web/support/environment/index.html for additional information. Mindspeed RoHS compliant devices are backwards compatible with 225 Revision History Revision Level B Released A Advance 21353-DSH-001-B Package 12x12 mm, 88 pin MLF package C reflow profiles. ° Date January 2009 Updated for production release ...
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... Symbol Parameter AVDDIO Analog I/O power supply voltage AVDDCORE/ Core power supply voltage DVDDCORE DVDDIO Digital I/O power supply voltage Tc Operating Case Temperature 21353-DSH-001-B Parameter Minimum 1.14 1.14 1.14 –20 ® Mindspeed Technologies Minimum Maximum — 2.1 — 1.5 — 3.6 –65 150 — 2000 — 500 Typical Maximum 1.2, 1.8 1.89 1 ...
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... AVDDIO - 0.05 1,2,3,6 350 6 — 4 — 4 — — — — — — 0.85 x DVDDIO — 0.25 x DVDDIO — — ® Mindspeed Technologies Electrical Characteristics Typical Maximum — 210 240 — 390 475 — 850 1000 — 925 1200 — 2 — — 3 — — ...
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... Two-wire serial interface can drive 500 pF at 100 kHz and 400 kHz, 100 pF at 3.4 MHz. 6. Measured using a CID pattern with a minimum CID length of 10 bits. 21353-DSH-001-B Note Minimum 5 0.85 x DVDDIO 5 — ® Mindspeed Technologies Electrical Characteristics Typical Maximum Unit — — V — 0.15 x DVDDIO V ...
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... IDLE Time = 106.2 ns Figure 2-4. 180 160 140 120 100 ® Mindspeed Technologies C case temperature, 800 mVppd ° = 50Ω, short L Output Waveform With COMWAKE OOB Signal COMWAKE Deterministic Jitter vs. Data Rate as a Function of Trace Length DJ @ 20" 30" 40" 1 ...
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... OutctrlN[7:5] Setting as a Function of AVDDIO A V DDIO = 1. DDIO = 1.8V 1600 1400 1200 1000 800 600 400 200 0 010 011 100 101 O u tctrlN[7:5] 21353-DSH-001-B Figure 2-7. Figure 2-8. 110 111 ® Mindspeed Technologies Typical Performance Characteristics Eye Diagram after Equalizing 40" of FR-4 trace at 4.25 Gbps Random Jitter Distribution 7 ...
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... DJ @ 4.25 Gbps Asserted De-asserted 1300 1500 17 Test Backplane with SMA- Hm-Zd adapter cards ® Mindspeed Technologies Typical Performance Characteristics Behavior LOS Hysteresis - LOS can be asserted asserted 50 100 150 200 Input voltage swing (mVppd) Error Detector/ M21353 Digital Evaluation Communications Module Analyzer 250 8 ...
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... Package Description The M21353 is assembled in 12x12 mm, 88 pin MLF packages. The package paddle should be soldered to the ground plane to provide a GND connection and a thermal path for the device. Figure 3-1. Package Outline Drawing 21353-DSH-001-B and Package Outline Drawing ® Mindspeed Technologies 9 ...
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... AVDDCORE 10 DOUT0P 11 DOUT0N 12 AVDDIO 13 DOUT1P 14 DOUT1N 15 AVDDCORE 16 DOUT2P 17 DOUT2N 18 AVDDIO 19 DOUT3P 20 DOUT3N 21 xSEL 22 SCL 21353-DSH-001-B Package Description and Package Outline Drawing M21353 12x12 mm MLF (0.5 mm pitch) ® Mindspeed Technologies 66 xALARM 65 ADDR1 64 DIN11N 63 DIN11P 62 AVDDCORE 61 DIN10N 60 DIN10P 59 AVDDCORE 58 DIN9N 57 DIN9P 56 AVDDCORE 55 DIN8N 54 DIN8P ...
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... Table 3-1. M21353 Pin Descriptions ( Pin Name Pin Number(s) AVDDIO 12,18,41, 49, 72, 78, DVDDIO AVDDCORE 15, 25, 28, 31, 34, 37, 38, 46, 52, 53, 56, 59, 62, 69, 75, 81, 82, 85 DVDDCORE GND Exposed pad on bottom of package xSEL SCL SDA ADDR2 ADDR1 ADDR0 (1) xALARM RSVD DIN0P DIN0N DIN1P ...
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... These pins are used for the REFCLK connection in the M21363. Mindspeed recommends that system PCBs for the M21353 include a refclk circuit if feasible to allow for the use of the M21363 on the same PCB. ...
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... Control Registers Map and 4.1 Control Registers Map Table 4-1. M21353 Register Summary Table ( Register D7 Address D6 Name (MSB) 00h Alarm Mode 01h Checksum 02h MIC Control 03h Gen Config Standby MSPD 05h Strobe ICL Select xSel Mode 06h Polarity Invert 07h Polarity Invert ...
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... Table 4-1. M21353 Register Summary Table ( Register D7 Address D6 Name (MSB) 11h* Intermediate Configuration for Output 5 Switch Config #1 12h Intermediate Configuration for Output 3 Switch Config #1 13h Intermediate Configuration for Output 1/Group 1 Switch Config #1 14h* Intermediate Configuration for Output 11 Switch Config #2 15h* Intermediate ...
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... Table 4-1. M21353 Register Summary Table ( Register D7 Address D6 Name (MSB) 24h* Input 4 Equalization 25h* Input 3 Equalization 26h Input 2 Equalization 27h Input 1 Equalization 28h Input 0 Equalization 35h* Input 11 MSPD Config B 36h* Input 10 MSPD Config B 37h* Input 9 MSPD Config B 38h* Input 8 MSPD Config B ...
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... Table 4-1. M21353 Register Summary Table ( Register D7 Address D6 Name (MSB) 45h* Output 7 Config Output 7 Swing 46h* Output 6 Config Output 6 Swing 47h* Output 5 Config Output 5 Swing 48h* Output 4 Config Output 4 Swing 49h* Output 3 Config Output 3 Swing 4Ah Output 2 Config Output/Group 2 Swing 4Bh ...
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... When the device is configured for SW strobe mode (address 03h, bit 3), Software strobe to update the active switch setting (ISC#1 or ISC#2 as determined by bit 7 of address 05h) 21353-DSH-001-B Control Registers Map and Descriptions Bit Description Bit Description Bit Description ® Mindspeed Technologies Default R/W 0000b R/W 0000b R/W Default ...
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... Address 0Ah - 0000 Address 0Bh - 0000 Address 0Ch - 0000 Address 0Dh - 0000 (Input group 0) Address 08h - 0000 Address 09h - 0000 Address 0Ah - 0000 Address 0Bh - 0000 Address 0Ch - 0010 (Input group 2) Address 0Dh - 0001 (Input group 1) ® Mindspeed Technologies Default R/W 0b R/W 0b R/W 0b R/W 0b R/W 0b R/W 0b ...
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... Address 15h - 0000 Address 16h - 0000 Address 17h - 0000 Address 18h - 0010 (Input group 2) Address 19h - 0001 (Input group 1) ® Mindspeed Technologies Default R/W (Lane Switch Mode) Address 0Eh - 1011 (Input 11) R/W Address 0Fh - 1001 (Input 9) Address 10h - 0011 (Input 3) Address 11h - 0001 (Input 1) ...
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... Input 8 (address 1Ah), input 4 (address 1Bh), input 0 (address 1Ch) powered on with high impedance (>100 kΩ single ended, 100Ω differential) termination 11: Input 8 (address 1Ah), input 4 (address 1Bh), input 0 (address 1Ch) powered on with source 50Ω single-ended (100Ω differential) termination 21353-DSH-001-B Control Registers Map and Descriptions Bit Description ® Mindspeed Technologies Default R/W 11 R/W 11 R/W 11 ...
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... Register Address: 41h, 42h, 43h, 44h, 45h, 46h, 47h, 48h, 49h, 4Ah, 4Bh, 4Ch Register Name: Output configuration Description: Configures the output swing and de-emphasis for output 11 (address 41h), output 10 (address 42h), output 9 (address 43h), output 8 21353-DSH-001-B Control Registers Map and Descriptions Bit Description Bit Description ® Mindspeed Technologies Default R/W 37h R/W Default R/W 11b ...
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... Description: After an EEPROM download, this register contains the checksum calculated value. If this value is not equal to 2Eh after an MIC download, there was either an issue with the download or the checksum seed value in register 01h is not correct. Bit 7:0 MIC Checksum Calculated Value 21353-DSH-001-B Control Registers Map and Descriptions Bit Description Bit Description Bit Description ® Mindspeed Technologies Default R/W 000b R/W 0b R/W 00b R/W 0b R/W ...
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... Register Name: Chip Revision Description: Contains the Chip revision number. Bit 7:0 Device Revision Register M21353G-13 = 02h Register Address: FFh Register Name: Master Reset Description: Used to perform master reset of device. Write "AAh" to this register, followed by a second write of "00h" to perform a master reset. Bit ...
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... Functional Description The M21353 is a twelve channel device with programmable input equalization, programmable output de-emphasis, and an embedded 12x12 crosspoint switch matrix. Details on various functionality and features are described in the following sections. Figure 5-1. Functional Block Diagram Din 0 P Input Buffer with Programmable ...
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... Input and Output Buffers The input buffers in the M21353 are designed to work with AC coupled input signals, and support operation with a wide range of AC coupling capacitor values. Applications that use PRBS and/or 8b/10b encoded data will typically use AC coupling capacitors with a value of 0.1 uF. SDI video applications will typically use AC coupling capacitors with a value of 4 ...
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... Squelch To avoid random chattering of the output due to noise when there is no signal present at the inputs, the M21353 includes a squelch feature to automatically inhibit the output when there is a LOS alarm. There is an option to inhibit to either logic H, logic L, or the EBI common mode level on squelch. In addition to the automatic squelch feature, a manual squelch can be forced through a register setting ...
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... When a software strobe is being used, bit 7 of register address 05h is used to select which ISC register is used when the ASC is updated. When the M21353 is configured for hardware strobe mode by setting bit 3 of register address 03h to "1", the xSEL hardware pin is used to update the ASC contents. The device can be configured in two different hardware strobe modes with bit 6 of register address 05h. With this bit set to " ...
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... Figure 5-3. M21353 Default ASC/ISC # 1 in group switch mode Card 0 Figure 5-4. M21353 Default ISC # 2 in group switch mode Card 0 21353-DSH-001-B M21353 Input/Output Input /Output Group 0 Input/Output M21353 Input/Output Input /Output Group 0 Input/Output ® Mindspeed Technologies Functional Description Group 1 Card 1 Card 2 Group 2 Group 1 ...
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... Boundary Scan Operation In order to test external connections to and from the M21353, the device includes support for boundary scan through a JTAG port when configured for boundary scan mode. Boundary scan is supported on control pins and high-speed input pins. Boundary scan is not supported on high-speed output pins. ...
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... H The two wire programming interface is designed to drive 500 pF at 100 and 400 kHz, and 100 pF at 3.4 MHz operation. During a write operation, data is latched into the M21353 registers on the rising edge of SCL during the acknowledge phase (ACK) of communication. Refer to the I that is applicable to the two-wire programming interface. ...
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... If the MIC mode is used in conjunction with an external host controller, the two wire interface on the host controller must not interrupt the programming buss while self configuration is taking place. This can be ensured by timing out the host controller for N x 0.8 seconds (N= number of M21353 devices in the self configure array monitoring the SDA/SCL buss for activity. ...
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... Newport Beach, CA 92660 © 2008-2009 Mindspeed Technologies ® , Inc. All rights reserved. Information in this document is provided in connection with Mindspeed Technologies ® ("Mindspeed ® ") products. These materials are provided by Mindspeed as a service to its customers and may be used for informational purposes only. Except as provided in Mindspeed’s Terms and Conditions of Sale for such products or in any separate agreement related to this document, Mindspeed assumes no liability whatsoever ...