zl30155 Zarlink Semiconductor, zl30155 Datasheet

zl30155

Manufacturer Part Number

zl30155

Description

Dual Channel Universal Clock Translator

Manufacturer

Zarlink Semiconductor

Datasheet

1.ZL30155.pdf (4 pages)

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Quantity

Price

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Meier Automation Equipment Co., Limited

Part Number:

zl30155GGG

Manufacturer:

ZARLINK

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Part Number:

zl30155GGG2

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Features

•

Two independent clock channels

Programmable synthesizers generate any clock-

rate from 1 kHz to 720 MHz

Two precision synthesizers generate clocks with

jitter below 0.7 ps RMS for 10 G PHYs

Programmable digital PLLs synchronize to any

clock rate from 1 kHz to 720 MHz

Flexible two-stage architecture translates between

arbitrary data rates, line coding rates and FEC

rates

Digital PLLs filter jitter from 14 Hz, 28 Hz, 56 Hz,

112 Hz, 224 Hz, 448 Hz or 896 Hz

Automatic hitless reference switching and digital

holdover on reference fail

Four reference inputs configurable as single ended

or differential

Eight LVPECL outputs and four LVCMOS outputs

JTAG

Ref2

Ref3

Osco

Ref0

Ref1

Osci

ZL30155

Master Clock

Single Ended

Differential /

JTAG

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

Reference Monitors

pwr_b

State Machine

Fr= Br

Figure 1 - Functional Block Diagram

DPLL0

DPLL1

*Kr

*Mr

GPIO

/Nr

Zarlink Semiconductor Inc.

Configuration

and Status

Dual Channel Universal Clock Translator

SPI / I

Clock Generator 0 (Precision)

Clock Generator 1 (Precision)

•

Applications

•

Fs= Bs

Operates from a single crystal resonator or clock

oscillator

Configurable via SPI/I2C interface

10 Gigabit linecards

Synchronous Ethernet, 10GBASE-R and

10 GBASE-W

OTN multiplexers and transponders

SONET/SDH, Fibre Channel, XAUI

Synthesizer 1

ZL30155GGG

ZL30155GGG2 100 Pin CABGA*

Synthesizer 0

Synthesizer 1

*Ks

*16*Ms

/Ns

*Pb Free Tin/Silver/Copper

/Ns

Ordering Information

Div C

Div D

Div A

Div B

Div C

Div D

Div A

Div B

-40

Div A

Div B

Div C

Div D

Div A

Div B

Div C

Div D

100 Pin CABGA

C to +85

Short Form Data Sheet

LVCMOS

LVPECL

LVCMOS

LVPECL

Outputs

ZL30155

Trays

hpdiff4_p/n

hpdiff5_p/n

hpdiff6_p/n

hpdiff7_p/n

hpoutclk2

hpoutclk3

hpdiff0_p/n

hpdiff1_p/n

hpdiff2_p/n

hpdiff3_p/n

hpoutclk0

hpoutclk1

April 2010

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zl30155 Summary of contents

Page 1

... Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2010, Zarlink Semiconductor Inc. All Rights Reserved. Dual Channel Universal Clock Translator Ordering Information ZL30155GGG ZL30155GGG2 100 Pin CABGA* *Pb Free Tin/Silver/Copper • Operates from a single crystal resonator or clock oscillator • ...

Page 2

... PHY devices. The ZL30155 integrates 2 independent digital PLLs, accepts 4 input references and generates 12 programmable clock outputs. The highly integrated solution allows designers to replace multiple components with a single chip, simplifying design and reducing component count and power ...

Page 3

... Mechanical Drawing ZL30155 3 Zarlink Semiconductor Inc. Short Form Data Sheet ...

Page 4

... Zarlink, ZL, the Zarlink Semiconductor logo and the Legerity logo and combinations thereof, VoiceEdge, VoicePort, SLAC, ISLIC, ISLAC and VoicePath are trademarks of Zarlink Semiconductor Inc. TECHNICAL DOCUMENTATION - NOT FOR RESALE ZL30155 visit our Web Site at www.zarlink.com C Patent rights to use these components ...

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