mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 140

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

.
Bit
10
11
9
8
7
6
5
4
3
2
1
0
PRBSMFOIM
MFOOFOIM
PRBSOIM
MFSYNIM
TFSYNIM
BPVOIM
BOMIM
BOMMI
FBEIM
CASRI
1SECI
2SECI
Name
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
Table 106 - Receive and Sync Interrupt Mask Register(Y44) (T1)
Bipolar Violation Counter Overflow Interrupt Mask. When unmasked an interrupt is
initiated whenever the bipolar violation counter changes from FFH to 00H. 1- masked, 0 -
unmasked.
Pseudo Random Bit Sequence Error Counter Overflow Interrupt Mask. When
unmasked an interrupt will be generated whenever the PRBS error counter changes from
FFH to 00H. 1 - masked, 0 -unmasked.
Pseudo Random Bit Sequence Multiframe Counter Overflow Interrupt Mask. When
unmasked an interrupt will be generated whenever the multiframe counter attached to the
PRBS error counter overflows. FFH to 00H. 1 - masked, 0 - unmasked.
Multiframes Out Of Sync Overflow Interrupt Mask. When unmasked an interrupt will be
generated when the multiframes out of frame counter changes from FFH to 00H. 1
-masked, 0 - unmasked.
Terminal Frame Synchronization Interrupt Mask. When unmasked an interrupt is
initiated when a loss of terminal frame synchronization condition exists. If 1 - masked, 0 -
unmasked.
Multiframe Synchronization Interrupt Mask. When unmasked an interrupt is initiated
when a loss of multiframe synchronization condition exist. If 1 - masked, 0 - unmasked.
Framing Bit Error Interrupt Mask. When unmasked an interrupt is initiated whenever an
erroneous framing bit is detected (if circuit is in terminal frame sync). 1-masked, 0-
unmasked.
Bit Oriented Message Interrupt. When unmasked an interrupt is initiated whenever a
pattern 111111110xxxxxx0 has been received on the FDL that is different from the last
message. The new message must persist for 8 out the last 10 message positions to be
accepted as a valid new message. 1 -masked, 0 - unmasked.
Bit Oriented Message Match Interrupt. When unmasked an interrupt is initiated
whenever a pattern 111111110xxxxxx0 has been received on the FDL that is different from
the last message and matches the contents of Bit Oriented Message Match Register. The
new message must persist for 8 out the last 10 message positions to be accepted as a
valid new message. 1 -masked, 0 - unmasked.
Receive Channel Associated Signaling(CAS) Change Interrupt. When unmasked an
interrupt is initiated whenever a change of state (optionally debounced - see RSDB in
signaling Control Word) is detected in the signaling bits (AB or ABCD) pattern.
One Second Interrupt Status. When unmasked an interrupt is initiated whenever the 1
SEC status bit goes from low to high. This bit is reset after a read of Y35 or Y25.
Two Second Interrupt Status. When unmasked an interrupt is initiated whenever the
2SEC status bit goes from low to high. This bit is reset after a read of Y35 or Y25.
Zarlink Semiconductor Inc.
MT9072
140
Functional Description
Data Sheet