mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 157

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

15-8
7-0
Bit
Bit
15-3
2
1
0
15-1
2-0
Bit
Bit
0
F4RVS
F4EVS
F4SVS
Name
Name
STAD
(7-0)
(0)
(0)
(0)
(0)
#
Name
ID15-3
STIS
Name
ID2-0
(000)
(0)
#
not used.
ST-BUS Analyser Data. This is the data for the ST-BUS analyser buffer. 920 is the first byte of the
data that is being "analyzed". The source of the data can be any ST-Bus stream from any Framer.
Framer 4 Elastic Vector Status. This bit if unmasked is set if any of the bits in the Interrupt
Receive Elasitc store register(436) or Elastic store status for Framer 4 are set. This bit can be
masked and will remain low by the F4EM bit in address 903.
Framer 4 Rx Line Vector Status. This bit if unmasked is set if any of the bits in the Interrupt
Receive Line status register(435) for Framer 4 are set. This bit can be masked and will remain low
by the F4RM bit in address 903.
Framer 4 Sync Vector Status. This bit if unmasked is set if any of the bits in the Interrupt Sync
status register(434) Framer 4 are set. This bit can be masked and will remain low by the F4SM bit
in address 903.
Table 126 - Identification Revision Code Data Register (Address 912) (T1)
Table 127 - ST-BUS Analyzer Vector Status Register (Address 913) (T1)
not used.
ST-BUS Analyser Interrupt Status. This bit is set if the ST-BUS Analyser is filled up.
Table 125 - Interrupt Vector 2 Status Register (Address 911) (T1)
ID Number. Contains 0100000001011.
These 3 bits make up a binary code which identify the revision of this device.
Table 128 - ST-BUS Analyser Data(Address 920-93F) (T1)
Zarlink Semiconductor Inc.
MT9072
Functional Description
Functional Description
Functional Description
157
Functional Description
Data Sheet