mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 210

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

17.2.8
Table 190 describes the bit functions of each (30 registers in total, one register for each PCM 30 channel) of the
Transmit CAS Data Registers in the MT9072. Each register is repeated for each of the 8 framers. Framer 0 is
addressed with Y=0, Framer 1 with Y=1, Framer 2 with Y=2 and so on up to Framer 7 with Y=7 (where Y represents
the 4 most significant address bits (MSB) A11-A8). In addition, a simultaneous write to all 8 framers is possible by
setting the MSB address to Y=8 (1000). Note that if corresponding MPST bit in the per timeslot control is not set
this memory will be constantly updated with CSTi values. Hence to use this registers for any channels the
corresponding MPST bit has to be set.
A (0), (1) or (#) in the “Name” column of these tables indicates the state of the data bits after a reset (RESET, RSTC
or RST). The (#) indicates that a (0) or (1) is possible.
For these functions to be valid, CAS mode must be selected (CSIG=0 register address Y03), and the timeslot
control must be selected (CASS(n)=1 register address Y90 to YAF).
15-4
Table 184 - National (CAS, National, CRC-4 Local and Timers) Interrupt Mask Register (Address Y46)
Bit
Bit
2
1
0
3
2
1
0
ONESECM
Name
Transmit CAS (ABCD) Data Registers (Y51 - Y6F) Bit Functions
T2M
T1M
(0)
(0)
(0)
(#### #### ####)
Table 185 - Channel n, Transmit CAS Data Register (Address Y51-Y6F) (E1)
Name
C(n)
D(n)
A(n)
B(n)
(#)
(#)
(#)
(#)
Timer 2 Mask. This is the mask bit for the T2I interrupt status bit in the National (CAS,
National, CRC-4 Local and Timers) Interrupt Status Register (address Y36). If this mask bit is
one, the corresponding interrupt bit will remain inactive. If this mask bit is zero, the
corresponding interrupt bit will function normally.
Timer 1 Mask. This is the mask bit for the T1I interrupt status bit in the National (CAS,
National, CRC-4 Local and Timers) Interrupt Status Register (address Y36). If this mask bit is
one, the corresponding interrupt bit will remain inactive. If this mask bit is zero, the
corresponding interrupt bit will function normally.
One Second Timer Status Mask. This is the mask bit for the ONESECI interrupt status bit in
the National (CAS, National, CRC-4 Local and Timers) Interrupt Status Register (address
Y36). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit
is zero, the corresponding interrupt bit will function normally.
not used.
Transmit Channel Associated Signaling (CAS) Signaling Bits for Channel 1 to
30.
Bits for n=1 to 15 correspond to channel 1 to 15 and are transmitted on the
PCM30 link in timeslot 16 in bit positions one to four in frame n.
Bits for n=17 to 31 correspond to channel 16 to 30 and are transmitted on the
PCM30 link in timeslot 16 in bit positions five to eight in frame n -16.
The corresponding CASS(n) bit must be one for this to function.
Zarlink Semiconductor Inc.
MT9072
Functional Description
(E1)
210
Functional Description
Data Sheet