mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 266

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

AC Electrical Characteristics - Receive Basic Frame and E4o Timing
1
2
3
3
RXDL
PCM 30
Bit Cells
E2i
Input
E4o - Note 1
(RxDLC Pin)
Output
RxBF
(Output)
Note 1 - The E4o signal is output at the RxDLC Pin when the E4CK control bit (address Y08) is set to one.
Note 2 - The PCM Timeslots are referred to RXDL Output which is delayed 4 bits from the RPOS/RNEG input.
Note3- The E4o Clock(RXDLC Output) is not a 50% duty cycle clock, it will be low for 25 % and high for 75% of the
4.096 MHz clock
Basic Frame Output Delay
Clock Delay
E4o Clock High Width
E4o Clock Low Width
Characteristics
t
E4
H
W
Figure 67 - Receive Basic Frame and E4o Timing
t
E4
L
W
Timeslot 31
Sym.
t
t
E4HW
E4LW
Bit 8
Zarlink Semiconductor Inc.
t
t
BD
CD
t
CD
MT9072
t
BD
Min.
30
50
25
266
Typ.
t
CD
Max.
200
115
55
75
Timeslot 0
Bit 1
Units
ns
ns
ns
ns
t
BD
150 pF load on RxBF
150 pF load on RxDLC
150 pF load on RxDLC
150 pF load on RxDLC
Test Conditions
Data Sheet
V
V
V
T
T
T