mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 272

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

19.4
In both the transmit and receive directions, PCM30 LSB maps to ST-BUS LSB.
20.0
T1.102-1993
T1.231-1993
T1.403-1995
T1.408-1990
TR 62411-1990
TA-TSY-000278 Issue1, 1985
G.711
CHANNEL
AC Electrical Characteristics - PCM30 and ST-BUS Frame Format
31 or 127
Applicable Specifications
FRAME
15
Standard
CHANNEL
FRAME
Significant
Significant
0
Bit (First)
Bit (First)
Table 204 - Applicable Telecommunications Specifications
0
Most
Most
TIMESLOT
BIT
0
BIT
Digital Heirarchy_Electrical Interfaces
Layer 1 In-Service Digital Transmission Performance Monitoring
Network to Customer Installation Metallic Interfaces
ISDN Primary Rate- Customer Installation Metallic Interfaces
Accunet T1.5 Service Description and Interface Specification
Digital Data Systems(DDS)- T1 Digital Multiplexor(T1DM) Requirements
Pulse Code Modulation(PCM) of Voice Frequencies
1
7
• • • • • • • •
BIT
2
• • •
BIT
TIMESLOT
6
Figure 74 - PCM 30 Format
Figure 75 - ST-BUS Format
Zarlink Semiconductor Inc.
BIT
1
3
BIT
5
MT9072
2.0 ms
125 µs
BIT
(8/2.048) µs
272
4
(8/2.048 or 8/8.192) µs
BIT
4
• • • •
BIT
5
BIT
CHANNEL
125 µs
3
30 or 126
BIT
6
FRAME
14
BIT
Title
2
BIT
7
TIMESLOT
31 or 127
CHANNEL
BIT
BIT
1
30
8
FRAME
15
Least
Significant
Bit (Last)
BIT
0
TIMESLOT
CHANNEL
Least
Significant
Bit (Last)
31
FRAME
0
0
Data Sheet