mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 34

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

Pin Description (continued)
LQFP
139
159
100
120
140
160
119
39
59
79
20
40
60
80
Pin #
LBGA
N11
F13
B15
N12
R14
F14
B16
L15
L16
M3
M4
N5
H2
N6
RxBF[0]
RxBF[1]
RxBF[2]
RxBF[3]
RxBF[4]
RxBF[5]
RxBF[6]
RxBF[7]
Name
FPi[1]
FPi[2]
FPi[3]
FPi[5]
FPi[6]
FPi[7]
Type
O
I
Frame Pulse. This pin accepts a frame pulse that sets the basic frame
boundary for the transmit and receive sides of the framer. In IMA mode
it accepts a frame pulse that sets the basic frame boundary for the
transmit side of the framer only. Pins FPi[0-7] are used to set the frame
boundaries for Framers[0-7] respectively. The clock rate is determined
by control bits at (Address 900). This pin has no function in
8.192 Mbit/s mode.
In 2.048 Mbit/s ST-BUS mode this pin accepts an ST-BUS
2.048 Mbit/s frame pulse that sets the basic frame boundary for the
data that appears at pins DSTi, DSTo, CSTi and CSTo. See Figure 34.
In T1 IMA mode, this pin accepts a 648 ns frame pulse that sets the
basic frame boundary for the transmit data that appears at pin DSTi.
IMA mode is selected by setting the IMA bit (Address Y00) to 1. See
Figure 40.
In E1 IMA mode, this pin accepts a 2.048 Mbit/s ST-BUS type frame
pulse that sets the basic frame boundary for the transmit data that
appears at pin DSTi. IMA mode is selected by setting the IMA bit
(Address Y00) to 1.
In T1 IMA mode and E1 IMA mode, the basic frame boundary for the
receive data stream that is output by DSTo is indicated by the clock
output by the RxBF pin.
Receive Basic Frame Pulse. This pin outputs a frame pulse that
indicates the basic frame boundary for the received data stream
output by the RxDL pin. In IMA mode the receive basic frame pulse
also indicates the basic frame boundary in the received data stream
output by the DSTo pin. Pins RxBF[0-7] are used to set the frame
boundaries for Framers[0-7] respectively.
In T1 mode, this pin provides a basic frame pulse that indicates the
S-bit in the 1.544 Mbit/s received data stream output by pin RxDL. See
Figure 48.
In T1 IMA mode, the Receive Basic Frame Pulse indicates the S-bit in
the 1.544 Mbit/s received data stream output by pin DSTo. IMA mode
is selected by setting the IMA bit (Address Y00) to 1. See Figure 39.
In E1 mode, this pin provides a 2.048 Mbit/s ST-BUS type frame pulse
that indicates the beginning of channel 0 in the 2.048 Mbit/s received
data stream output by the RxDL pin. See Figure 69.
In E1 IMA mode, the receive basic frame pulse indicates the beginning
of channel 0 in the 2.048 Mbit/s received data stream output by the
DSTo pin. IMA mode is selected by setting the IMA bit (Address Y00)
to 1. See Figure 58.
Zarlink Semiconductor Inc.
MT9072
34
Description (see Notes 1 to 7)
Data Sheet