ibm3206k0424 ETC-unknow, ibm3206k0424 Datasheet - Page 516

• Manufacturer Part Number: ibm3206k0424
• Description: Ibm Processor For Network Resources
• Manufacturer: ETC-unknow

IBM3206K0424
IBM Processor for Network Resources
20.7: Clock Control Register (Nibble Aligned)
Used to disable clocks for power conservation and provide the Select A Clock function for MPEG and front
end support. To change a nibble field in this register, always set it to ’0’ first, and then to the new value.
Length
Type
Address
POR Value
Reset and Power-on Logic (CRSET)
Page 516 of 676
28
27-24
23-20
19-16
15-12
Bit(s)
Bit(s)
11-8
2-0
7-4
28
Control for BIST
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Encoded
Speed
Encoded Control for Selecting Clk
Speed
Framer Tree Disabled (FRAMR)
Reserved (for Encoded Control for
BIST Clock Rate)
Reserved (for Encoded Control for
PCORE Clock Rate)
Memory Clock Control
Encoded Control for Cell Opportu-
nity Logic (CELLO)
Encoded Control for MPEG Clock-
ing Logic (MPEGT)
Encoded Control for Transmit
Logic (LINKT) and Sonet Framer
(FRAMR)
(Encoded Con-
trol for PCORE
Clock Rate)
Reserved
Name
Name
29 bits
Read/Write
XXXX 0520
X'000E5532'
Memory Clock
Encoded
Control
These three bits have the same encoding as the chip I/O pffcfg(2-0) bits.
When set, this bit will disable the clock tree to the Sonet Framer Logic.
Reserved
Reserved
Encoding of bits:
X'D’
X'E'
X'F'
Same as bits 3-0.
Same as bits 3-0.
Same as bits 3-0.
Use an early version of the clock
Use a nominal version of the clock
Use a late version of the clock
Control for Cell
Logic (CELLO)
Opportunity
Encoded
Clocking Logic
Control for
(MPEGT)
Encoded
MPEG
Description
Description
8
Transmit Logic
Sonet Framer
7
(LINKT) and
Control for
(FRAMR)
Encoded
6
5
4
Receive Logic
Sonet Framer
3
(LINKR) and
Control for
(FRAMR)
Encoded
2
1
pnr25.chapt05.01
August 14, 2000
0
Preliminary