s71ws256nc0bawa30 Meet Spansion Inc., s71ws256nc0bawa30 Datasheet - Page 96

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s71ws256nc0bawa30

Manufacturer Part Number
s71ws256nc0bawa30
Description
Stacked Multi-chip Product Mcp 256/512/128 Megabit 32m/16m/8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Flash Memory With 128/64megabit 8m/4m X 16-bit Psram.
Manufacturer
Meet Spansion Inc.
Datasheet
15.1
94
Common Flash Memory Interface
The Common Flash Interface (CFI) specification outlines device and host system software inter-
rogation handshake, which allows specific vendor-specified soft-ware algorithms to be used for
entire families of devices. Software support can then be device-independent, JEDEC ID-indepen-
dent, and forward- and back-ward-compatible for the specified flash device families. Flash
vendors can standardize their existing interfaces for long-term compatibility.
This device enters the CFI Query mode when the system writes the CFI Query command, 98h, to
address (BA)555h any time the device is ready to read array data. The system can read CFI in-
formation at the addresses given in Tables 15.3–15.6) within that bank. All reads outside of the
CFI address range, within the bank, returns non-valid data. Reads from other banks are allowed,
writes are not. To terminate reading CFI data, the system must write the reset command.
The following is a C source code example of using the CFI Entry and Exit functions. Refer to
the Spansion Low Level Driver User’s Guide (available on www.amd.com and
www.fujitsu.com) for general information on Spansion Flash memory software development
guidelines.
/* Example: CFI Entry command */
/* Example: CFI Exit command
For further information, please refer to the CFI Specification (see JEDEC publications JEP137-A
and JESD68.01and CFI Publication 100). Please contact your sales office for copies of these
documents.
*( (UINT16 *)bank_addr + 0x555 ) = 0x0098;
*( (UINT16 *)bank_addr + 0x000 ) = 0x00F0;
Addresses
Addresses
1Dh
1Bh
1Ch
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
000Ah
0017h
0019h
0000h
0000h
0006h
0009h
0000h
0004h
0004h
0003h
0000h
Data
0051h
0052h
0059h
0002h
0000h
0040h
0000h
0000h
0000h
0000h
0000h
Data
Table 15.3 CFI Query Identification String
A d v a n c e
*/
S71WS-Nx0 Based MCPs
Table 15.4 System Interface String
V
D7–D4: volt, D3–D0: 100 millivolt
V
D7–D4: volt, D3–D0: 100 millivolt
V
V
Typical timeout per single byte/word write 2
Typical timeout for Min. size buffer write 2
Typical timeout per individual block erase 2
Typical timeout for full chip erase 2
Max. timeout for byte/word write 2
Max. timeout for buffer write 2
Max. timeout per individual block erase 2
Max. timeout for full chip erase 2
CC
CC
PP
PP
Min. voltage (00h = no V
Max. voltage (00h = no V
Min. (write/erase)
Max. (write/erase)
Query Unique ASCII string “QRY”
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
/* write CFI entry command
/* write cfi exit command
I n f o r m a t i o n
PP
PP
N
pin present)
times typical
pin present)
N
times typical (00h = not supported)
Description
N
N
times typical
ms (00h = not supported)
Description
N
N
times typical
N
µs (00h = not supported)
N
ms
µs
S71WS-N_01_A4 September 15, 2005
*/
*/

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