hi-1579pst Holt Integrated Circuits, Inc., hi-1579pst Datasheet
hi-1579pst
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hi-1579pst Summary of contents
Page 1
... The receiver section of the each bus converts the 1553 bus bi-phase differential data to complementary CMOS / TTL data suitable for inputting to a Manchester decoder. Each receiver has a separate enable input which can be used to force the output of the receiver to a logic "0". To minimize the package size for this function, the ...
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... TXA B / are ei transformer coupled interface (see Figure 3), the transceiver is also connected to a 1:2.5 isolation transformer which in turn is connected to a 1:1.4 coupling transformer. The transformer coupled method also requires two coupling resistors equal to 75% of the bus characteristic impedence (Zo) between the coupling transformer and the bus. ...
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... TXINHA/B RECEIVER RXA/B Receive Logic RXA/B Comparator RXENA/B TXA/B TXA/B BUSA/B - BUSA/B Vin (Line to Line RXA/B RXA/B HI-1579 BUSA/B BUSA/B Input Filter Figure 1. Block Diagram TRANSMIT WAVEFORM - EXAMPLE PATTERN RECEIVE WAVEFORMS - EXAMPLE PATTERN HOLT INTEGRATED CIRCUITS ...
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... IL I Digital inputs IH I Digital inputs -1.0mA, Digital outputs OH OUT 1.0mA, Digital outputs IH OUT D R Differential (at chip BUS pins Differential IN CMRR V Differential IN V ICM V THD 1 MHz Sine Wave (Measured at Point “A “ in Figure THND (RX pulse width 70 ns) ...
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... D 35 ohm load V OUT (Measured at Point “A “ in Figure 2) 70 ohm load V OUT (Measured at Point “A “ in Figure 3) V Differential, inhibited ON 35 ohm load V DYN (Measured at Point “A “ in Figure 2) 70 ohm load V DYN (Measured at Point “A “ in Figure 3) R Differential, not transmitting ...
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... PACKAGE The HI-1579PSI/T/M uses a 20-pin thermally enhanced SOIC package. The package includes a metal heat sink located on the bottom surface of the device. This heat sink should be soldered down to the printed circuit board for optimum thermal dissipation. electrically isolated and may be soldered to any convenient power or ground plane ...
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... TO +85°C I -55°C TO +125°C T -55°C TO +125°C M PACKAGE DESCRIPTION 44 PIN PLASTIC CHIP-SCALE LPCC (44PCS) not available with ‘M’ Flow 20 PIN PLASTIC ESOIC, Thermally Enhanced Wide SOIC w/Heat Sink (20HWE) RXENA = 0 RXENB = 0 RXA RXA RXB RXB ...
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PLASTIC SMALL OUTLINE (ESOIC (Wide Body, Thermally Enhanced) .504 ± .008 (12.79 ± .19) .407 ± .013 Top View (10.325 ± .32) .0165 ± .0035 (.419 ± .089) .050 BSC (1.27) BSC = “Basic Spacing between Centers” ...
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... PLASTIC CHIP-SCALE PACKAGE .276 BSC (7.00) .276 Top View BSC (7.00) .039 max (1.00) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) PACKAGE DIMENSIONS .203 ± .006 (5.15 ± .15) Electrically isolated heat sink .008 pad on bottom of package. ...