am41dl3208gt85it Meet Spansion Inc., am41dl3208gt85it Datasheet - Page 15

• Manufacturer Part Number: am41dl3208gt85it
• Description: 32 Mbit 4 M ? 8-bit/2 M ? 16-bit Cmos 3.0 Volt-only, Simultaneous Operation Flash Memory And 8 Mbit 1 M ? 8-bit/512 K ? 16-bit Static Ram Preliminary
• Manufacturer: Meet Spansion Inc.

Legend: L = Logic Low = V
Input, Byte Mode, SADD = Flash Sector Address, A
Data Out, DNU = Do Not Use
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
6. If WP#/ACC = V
14
Operation
(Notes 1, 2)
Read from Flash
Write to Flash
Standby
Output Disable
Flash Hardware
Reset
Sector Protect
(Note 5)
Sector Unprotect
(Note 5)
Temporary
Sector Unprotect
Read from SRAM
Write to SRAM
If WP#/ACC = V
Block Protection and Unprotection”.
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = V
Table 4. Device Bus Operations—Flash Byte Mode, CIOf = V
V
CE#f CE1#s CE2s OE# WE#
0.3 V
IL
ACC
IL
CC
, the two outermost boot sectors remain protected. If WP#/ACC = V
, the boot sectors will be protected. If WP#/ACC = V
H
X
X
H
H
L
L
L
L
(9V), the program time will be reduced by 40%.
±
IL
, CE1#s = V
IL
H
H
H
H
H
H
H
X
X
X
L
X
X
X
X
L
L
, H = Logic High = V
HH,
X
X
X
H
X
X
X
X
H
H
all sectors will be unprotected.
L
L
L
L
L
L
L
IL
and CE2s = V
H
X
H
X
H
H
X
X
L
L
P R E L I M I N A R Y
H
X
H
X
X
H
L
L
L
L
IH
, V
IN
IH
ID
= Address In (for Flash Byte Mode, DQ15 = A-1), D
SA
SA
SA
SA
Am41DL3208G
X
X
X
X
X
X
X
at the same time.
= 11.5–12.5 V, V
A1 = H,
A1 = H,
A6 = L,
A6 = L,
SADD,
SADD,
A0 = L
A0 = L
Addr.
A
A
A
A
A
X
X
X
IN
IN
IN
IN
IN
(Note 3)
IH
LB#s
DNU
HH
the boot sectors protection will be removed.
X
X
X
X
X
X
X
X
X
= 9.0 ± 0.5 V, X = Don’t Care, SA = SRAM Address
(Note 3)
UB#s
DNU
IL
X
X
X
X
X
X
X
X
X
; SRAM Byte Mode, CIOs = V
IH
, the two outermost boot sector protection
RESET#
V
0.3 V
V
V
V
CC
H
H
H
H
H
L
ID
ID
ID
±
WP#/ACC
(Note 6)
(Note 6)
(Note 4)
(Note 3)
L/H
L/H
L/H
L/H
H
X
X
IN
February 13, 2002
= Data In, D
High-Z
High-Z
High-Z
DQ7–
D
D
DQ0
D
D
D
D
D
OUT
OUT
IN
IN
IN
IN
IN
SS
DQ15–
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
OUT
DQ8
X
X
=