am41dl3208gt85it Meet Spansion Inc., am41dl3208gt85it Datasheet - Page 2

• Manufacturer Part Number: am41dl3208gt85it
• Description: 32 Mbit 4 M ? 8-bit/2 M ? 16-bit Cmos 3.0 Volt-only, Simultaneous Operation Flash Memory And 8 Mbit 1 M ? 8-bit/512 K ? 16-bit Static Ram Preliminary
• Manufacturer: Meet Spansion Inc.

Am41DL3208G
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash
Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Static RAM
DISTINCTIVE CHARACTERISTICS
MCP Features
I Power supply voltage of 2.7 to 3.3 volt
I High performance
I Package
I Operating Temperature
Flash Memory Features
ARCHITECTURAL ADVANTAGES
I Simultaneous Read/Write operations
I Flexible Bank
I Secured Silicon (SecSi) Sector: Extra 256 Byte sector
I Zero Power Operation
I Top or bottom boot block
I Manufactured on 0.17 µm process technology
I Compatible with JEDEC standards
PERFORMANCE CHARACTERISTICS
I High performance
I Ultra low power consumption (typical values)
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
— Access time as fast as 70 ns
— 73-Ball FBGA
— –40°C to +85°C
— Data can be continuously read from one bank while
— Zero latency between read and write operations
— Read may occur in any of the three banks not being written
— Four banks may be grouped by customer to achieve desired
— Factory locked and identifiable: 16 bytes available for
— Customer lockable: Sector is one-time programmable. Once
— Sophisticated power management circuits reduce power
— Pinout and software compatible with single-power-supply
— Access time as fast as 70 ns
— Program time: 4 µs/word typical utilizing Accelerate function
— 2 mA active read current at 1 MHz
executing erase/program functions in other bank
or erased.
bank divisions.
secure, random factory Electronic Serial Number; verifiable
as factory locked through autoselect function.
locked, data cannot be changed
consumed during inactive periods to nearly zero
flash standard
PRELIMINARY
TM
architecture
Refer to AMD’s Website (www.amd.com) for the latest information.
I Minimum 1 million write cycles guaranteed per sector
I 20 Year data retention at 125°C
SOFTWARE FEATURES
I Data Management Software (DMS)
I Supports Common Flash Memory Interface (CFI)
I Unlock Bypass Program command
HARDWARE FEATURES
I Any combination of sectors can be erased
I Ready/Busy# output (RY/BY#)
I Hardware reset pin (RESET#)
I WP#/ACC input pin
I Sector protection
SRAM Features
I Power dissipation
I CE1s# and CE2s Chip Select
I Power down features using CE1s# and CE2s
I Data retention supply voltage: 1.5 to 3.3 volt
I Byte data control: LB#s (DQ7–DQ0), UB#s (DQ15–DQ8)
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
— Reliable operation for the life of the system
— AMD-supplied software manages data programming and
— Eases sector erase limitations
— Reduces overall programming time when issuing multiple
— Hardware method for detecting program or erase cycle
— Hardware method of resetting the internal state machine to
— Write protect (WP#) function allows protection of two outermost
— Acceleration (ACC) function accelerates program timing
— Hardware method of locking a sector, either in-system or
— Temporary Sector Unprotect allows changing data in
— Operating: 30 mA maximum
— Standby: 15 µA maximum
erasing, enabling EEPROM emulation
program command sequences
completion
reading array data
boot sectors, regardless of sector protect status
using programming equipment, to prevent any program or
erase operation within that sector
protected sectors in-system
Publication# 25870
Issue Date: February 13, 2002
Rev: A Amendment/0