thncf032maa TOSHIBA Semiconductor CORPORATION, thncf032maa Datasheet
thncf032maa
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thncf032maa Summary of contents
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Product Specifications Product Specifications Product Specifications Product Specifications Dimensions： ： ： ： Dimensions Dimensions Dimensions Type I card： 36.4mm(L) x 42.8mm (W) x 3.3mm (H) Weight： 14 0.5 oz Storage Capacities Storage Capacities： ： ： ： Storage Capacities ...
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Electrical Specification Electrical Specification Electrical Specification Electrical Specification ABSOLUTE MAXIMUM RATINGS ABSOLUTE MAXIMUM RATINGS ABSOLUTE MAXIMUM RATINGS ABSOLUTE MAXIMUM RATINGS SYMBOL RATING Vcc Power Supply Voltage Vin Input Voltage Tstg Storage Temperature Topr Operating Temperature DC RECOMMENDED OPERATING CONDITIONS DC ...
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Physical Specifications 1.60mm±.05 ( .063 in ±.002) 26 3.30mm±. .130 in ±.004 ) 1.01mm±0.7 ( .039 in ±.003) 41.66mm±.13(1.640 in. ±. 005) 4XR 0.5mm ±.1 (4XR.020 in.±. 004) Note: The optional notched configuration was shown in the CF ...
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... True IDE mode. The configuration of the CompactFlash Card will be controlled using the standard PCMCIA configuration registers starting at address 200h in the Attribute Memory space of the storage card.or for True IDE Mode, pin 9 being grounded ...
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Pin Assignments and Pin Type PC Card Memory Mode Pin Signal Pin In,Out Num. Name Type Type 1 GND Ground 2 D03 I/O I1Z, OZ3 3 D04 I/O I1Z, OZ3 4 D05 I/O I1Z, OZ3 5 D06 I/O I1Z, OZ3 ...
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PC Card Memory Mode Pin Signal Pin In,Out Num. Name Type Type 37 RDY/BSY O OT1 38 VCC POWER 39 -CSEL I I2Z 40 -VS2 O OPEN 41 RESET I I2Z 42 -WAIT O OT1 43 -INPACK O OT1 44 ...
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Signal Description gnal Description gnal Description gnal Description Signal Name Dir. A10 - A0 I (PC Card Memory Mode) A10 – A0 (PC Card I/O Mode) A2 – (True IDE Mode) BVD1 I/O (PC Card ...
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Signal Name Dir. -CSEL I (PC Card Memory Mode) -CSEL (PC Card I/O Mode) -CSEL (True IDE Mode) D15 – D00 I/O (PC Card Memory Mode) D15 – D00 (PC Card I/O Mode) D15 – D00 (True IDE Mode) GND ...
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Signal Name Dir. -OE I (PC Card Memory Mode) -OE (PC Card I/O Mode) -ATA SEL (True IDE Mode) RDY/-BSY O (PC Card Memory Mode) -IREQ (PC Card I/O Mode) INTRQ (True IDE Mode) -REG I (PC Card Memory Mode) ...
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Signal Name Signal Name Signal Name Signal Name Dir. Dir. Pin Dir. Dir. -VS1 O -VS2 (PC Card Memory Mode) -VS1 -VS2 (PC Card I/O Mode) -VS1 -VS2 (True IDE Mode) -WAIT O (PC Card Memory Mode) -WAIT (PC Card ...
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Access Specifications Attribute access specifications Attribute access specifications Attribute access specifications Attribute access specifications When CIS-ROM region or Configuration register region is accessed, read and write operations are executed under the condition of –REG=”L” as follows. ...
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Task File register access specifications Task File register access specifications Task File register access specifications Task File register access specifications There are two cases of Task File register mapping, one is mapped I/O address area, the other is mapped Memory ...
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Memory address map Memory address map Memory address map Memory address map Task File Register Read Access Mode (2) Task File Register Read Access Mode (2) Task File Register Read Access Mode (2) Task File Register Read Access Mode (2) ...
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True IDE Mode True IDE Mode True IDE Mode True IDE Mode The card can be configured in a True IDE This card is configured in this mode only when the-OE input signal is asserted GND by the host. In ...
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Configuration register specifications Configuration register specifications Configuration register specifications Configuration register specifications This card supports four Configuration registers for the purpose of the configuration and observation of this card. These registers can be used in memory card mode and I/O ...
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Configuration and Status register ( Configuration and Status register ( Configuration and Status register (Address 202H) Configuration and Status register ( This register is used for observing the state of the card. bit7 bit7 bit7 bit7 ...
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Pin Replacement register (Address 204H) Pin Replacement register (Address 204H) Pin Replacement register (Address 204H) Pin Replacement register (Address 204H) This register is used for providing the state of –IREQ signal when the card configured I/O ...
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... CIS information CIS information CIS CIS information information CIS information of CompactFlash card is defined as follows. Address Address Address Address Data Data Data Data Description of contents Description of contents Description of contents Description of contents 000H 01h CISTPL_DEVICE 002H 03h TPL_LINK 004H d9h Device information 006H ...
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Specific Strings) 050H xxh ' ' (Vender Specific Strings) 052H xxh ' ' (Vender Specific Strings) 054H xxh ' ' (Vender Specific Strings) 056H xxh ' ' (Vender Specific Strings) 058H 00h Null terminator 05AH ...
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Memory length (256 byte pages) 0A8H 20h Misc features 0AAH 1bh CISTPL_CFTABLE_ENTRY 0ACH 06h TPL_LINK 0AEH 00h Configuration Index Byte 0B0H 01h Feature Select 0B2H 21h Vcc Selection Byte 0B4H b5h Nom V Parameter 0B6H 1eh Nom V ...
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Address length 100H eeh IRQ parameter 102H 20h Misc features 104H 1bh CISTPL_CFTABLE_ENTRY 106H 06h TPL_LINK 108H 02h Configuration Index Byte 10AH 01h Feature Select 10CH 21h Vcc Selection Byte 10EH b5h Nom V Parameter 110H 1eh Nom ...
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Task File register specification Task File register specification Task File register specification Task File register specification These registers are used for reading and writing the storage data in this card. These registers are mapped five types by the configuration of ...
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Contiguous I/O map (INDEX=1) Contiguous I/O map (INDEX=1) Contiguous I/O map (INDEX=1) Contiguous I/O map (INDEX= REG REG A10 to A4 A10 REG REG A10 to ...
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Secondary I/O map (INDEX=3) Secondary I/O map (INDEX=3) Secondary I/O map (INDEX=3) Secondary I/O map (INDEX= REG REG A10 A10 REG REG A10 ...
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This register is a 16-bit register that has read/write ability, and it is used for transferring 1 sector 1.Data register: 1.Data register: 1.Data register: data between the card and the host. This register can be accessed in word ...
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This register contains the starting sector number, which is started by following sector transfer command. bit7 bit7 bit7 bit7 bit6 bit6 bit6 bit6 bit5 bit5 bit5 bit5 6.Cylinder ...
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This register is read only register, and it indicates the card status of command execution. When register: this register is read in configured I/O card mode (INDEX=1,2,3) and level interrupt mode, -IREQ is ...
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Command Command Command code Command code Command Command Command code Command code Check power mode E5H or 98H Execute drive diagnostic 90H Erase sector C0H Format track 50H Identify Drive ECH Idle E3H or 97H Idle immediate E1H or 95H ...
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Note: FR: Feature register SC: Sector Count register SN: Sector Number register CY: Cylinder register DR: DRV bit of Drive Head register HD: Head Number of Drive Head register LBA: Logical Block Address Mode Supported Y: The register contains a ...
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ATA Command specifications ATA Command specifications ATA Command specifications ATA Command specifications This table summarizes the ATA command set with the paragraphs. Following shows the supported commands and command codes, which are written in command registers. ATA Command Set ATA ...
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Note： FR：Feature Register SC：Sector Count register SN：Sector Number register (01H to 20H) CY：Cylinder Low/High register DR：Drive bit of Drive/Head register HD：Head No.( Drive/Head register Y：Set up －：Not set up 1. Check Power Mode (code: E5H or 98H): ...
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Identify Drive Information Identify Drive Information Identify Drive Information Identify Drive Information Word address Word address Word address Word address Default value Default value Total bytes Default value Default value Total bytes Data field type information Total bytes Total bytes ...
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Read Multiple (code: C4H): This command performs similarly to the Read Sectors command. Interrupts are not generated on each sector, but on the transfer of a block which contains the number of sectors defined by a Set Multiple command. ...
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Wear Level (code: F5H): This command effectively a NOP command and only implemented for backward compatibility. The Sector Count Register will always be returned with a 00H indicating Wear Level is not needed. 24. Write Buffer (code: E8H): This ...
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Sector Transfer Protocol Sector Transfer Protocol Sector Transfer Protocol Sector Transfer Protocol 1.Sector read: sector read procedure after the card configured I/O interface is shown as follows. Set the cylinder low/high register Set the head No. of drive head register ...
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I/O interface is shown as follows. ( A10 -CE1 -CE2 -IOWR -IORD 01H20H D0H→ → → → 58H (Data transfer D15 ...
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Set the cylinder low/high register Set the head No. of drive head register Set the sector number register Set in sector count register Set “30H” in command register N Read the status register N “51H” Read 256 times the data ...
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A0 to A10 -CE1 -CE2 -IOWR -IORD D0 to D15 01H30H D0H→ → → → 58H (Data transfer) -IREQ Absolute Maximum Ratings Absolute Maximum Ratings Absolute Maximum Ratings Absolute Maximum Ratings Parameter ...
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Card System performance Card System performance Card System performance Card System performance Item Item Item Item Set up times (Reset to ready) Set up times (Sleep to idle) Set up times (Deep power down to idle) Data transfer rate to/from ...
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DC Characteristics (Ta=0 to +70° Characteristics DC Characteristics DC Characteristics 1 (Ta=0 to +70° (Ta=0 to +70° (Ta=0 to +70°C, V Paramet Paramet Paramet Parameter Symbol Symbol ...
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AC Characteristics (Ta ° Characteristics (Ta Characteristics (Ta Characteristics (Ta Attribute Memory Read AC Characteristics Attribute Memory Read AC Characteristics Attribute ...
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Attribute Memory Write AC Characteristics Attribute Memory Write AC Characteristics Attribute Memory Write AC Characteristics Attribute Memory Write AC Characteristics Parameter Parameter Parameter Parameter Symbol Symbol Symbol Symbol Write cycle time tCW Write pulse time tw(WE) Address setup time tsu(A) ...
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I/O Access Read AC Characteristics I/O Access Read AC Characteristics I/O Access Read AC Characteristics I/O Access Read AC Characteristics Parameter Parameter Parameter Parameter Data delay after –IORD Data hold following –IORD -IORD pulse width Address setup before -IORD Address ...
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I/O Access Write AC Characteristics I/O Access Write AC Characteristics I/O Access Write AC Characteristics I/O Access Write AC Characteristics Parameter Parameter Parameter Parameter Data setup before –IOWR Data hold following –IOWR -IOWR pulse width Address setup before –IOWR Address ...
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Command Memory Access Read AC Characteristics Command Memory Access Read AC Characteristics Command Memory Access Read AC Characteristics Command Memory Access Read AC Characteristics Parameter Parameter Parameter Parameter -OE access time Output disable time (-OE) Address setup time Address hold ...
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Common Memory Access Write AC Characteristic Common Memory Access Write AC Characteristic Common Memory Access Write AC Characteristic Common Memory Access Write AC Characteristic Parameter Paramete Paramete Paramete Data setup time (-WE) Data hold time Write pulse ...
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The IDE Mode Access Read AC Characteristics The IDE Mode Access Read AC Characteristics The IDE Mode Access Read AC Characteristics The IDE Mode Access Read AC Characteristics Parameter Parameter Parameter Parameter Data delay after IORD Data hold following IORD ...
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True IDE Mode Access Write AC Cha True IDE Mode Access Write AC Cha True IDE Mode Access Write AC Characteristics True IDE Mode Access Write AC Cha Parameter Parameter Parameter Parameter Data setup before IOWR Data hold following IOWR ...
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Reset Characteristics (only Memory Card Mode or I/O Card Mode) Reset Characteristics (only Memory Card Mode or I/O Card Mode) Reset Characteristics (only Memory Card Mode or I/O Card Mode) Reset Characteristics (only Memory Card Mode or I/O Card Mode) ...
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... IDE mode. l After the card hard reset, soft reset, or power on reset, ATA reset, command applied the card cannot access during +RDY/-BSY pin is “low” level. Flash card can’t be operated in this case. l Before the card insertion V can not be supplied to the card. After confirmation that –CD1, -CD2 pins are ...