hb286008c2 HITACHI, hb286008c2 Datasheet
hb286008c2
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hb286008c2 Summary of contents
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... Description HB286008C2, HB286015C2, HB286030C2 are CompactFlash™. This card complies with CompactFlash™ specification, and is suitable for the usage of data storage memory medium for PC or any other electric equipment and digital still camera. This card is equipped with Hitachi 64 Mega bit Flash memory HN29W6411 ...
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... HB286008C2, HB286015C2, HB286030C2 Card Line Up Type no. HB286008C2 HB286015C2 HB286030C2 2 Card density ...
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... VCC -CD2 26 -CD1 27 D11 28 D12 29 D13 30 D14 HB286008C2, HB286015C2, HB286030C2 I/O card mode I/O Signal name — GND I/O D3 I/O D4 I/O D5 I -CE1 I A10 I - — VCC ...
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... HB286008C2, HB286015C2, HB286030C2 Memory card mode Pin NO. Signal name 31 D15 32 -CE2 33 -VS1 34 -IORD 35 -IOWR 36 -WE 37 RDY/-BSY 38 VCC 39 -CSEL 40 -VS2 41 RESET 42 -WAIT 43 -INPACK 44 -REG 45 BVD2 46 BVD1 D10 50 GND 4 I/O card mode I/O Signal name I/O D15 I -CE2 O -VS1 I -IORD I -IOWR I -WE O -IREQ — ...
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... Attribute area accessing. Attribute memory area is located only even address are valid and D8 to D15 are invalid in the word access mode. Odd addresses are invalid in the byte access mode. In True IDE Mode this input signal is not used and should be connected to VCC. HB286008C2, HB286015C2, HB286030C2 5 ...
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... HB286008C2, HB286015C2, HB286030C2 Battery voltage detection, Digital audio output, Disk active/slave present (BVD2, -SPKR, -DASP: output/output): In memory card mode, BVD2 outputs the battery voltage status in the card. This card has no battery, so this output is high level constantly. In I/O card mode, -SPKR is held High because this card dose not have digital audio output ...
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... BVD1/-STSCHG/-PDIAG -WAIT/IORDY VS1 VS2 BVD2/-SPKR/-DASP -CD1 -CD2 Note: -CE2, -CE1, -OE, -WE, -IORD, -IOWR, -REG, RESET, -CSEL pin are pulled up in card. HB286008C2, HB286015C2, HB286030C2 internal V CC Flash memory bus Controller OPEN Reset IC X'tal HN29W6411 Cotrol signal ...
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... HB286008C2, HB286015C2, HB286030C2 Card Function Explanation Register construction Attribute region Configuration register Configuration Option register Configuration and Status register Pin Replacement register Socket and Copy register CIS ( C ard I nformation S tructure) Task File region Data register Error register Feature register Sector Count register ...
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... Standby mode Byte access (8-bit Word access (16-bit) L Odd byte access (8-bit) L Note Attribute Access Timing Example A0 to A10 -REG -CE2/-CE1 -OE - D15 HB286008C2, HB286015C2, HB286030C2 -CE2 -CE1 -CE2 -CE1 ...
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... HB286008C2, HB286015C2, HB286030C2 2. Task File register access specifications There are two cases of Task File register mapping, one is mapped I/O address area, the other is mapped Memory address area. Each case of Task File register read and write operations are executed under the condition as follows. That area can be accessed by Byte/Word/Odd Byte mode which are defined by PC card standard specifications ...
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... Standby mode Byte access (8-bit Word access (16-bit) H Odd byte access (8-bit) H Note Task File Register Access Timing Example ( A10 -REG -CE2/-CE1 -OE - D15 HB286008C2, HB286015C2, HB286030C2 -CE1 A0 - ...
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... HB286008C2, HB286015C2, HB286030C2 3. True IDE Mode The card can be configured in a True IDE Mode of operation. This card is configured in this mode only when the -OE input signal is asserted low by the host during the power off to power on cycle. In this True IDE Mode the PCMCIA protocol and confuguration is disabled and only I/O operations to the Task File and Data Register are allowed ...
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... Card mode Memory card I/O card I/O card I/O card HB286008C2, HB286015C2, HB286030C2 bit4 bit3 Task File register address 0H to FH, 400H to 7FFH xx0H to xxFH 1F0H to 1F7H, 3F6H to 3F7H 170H to 177H, 376H to 377H bit2 ...
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... HB286008C2, HB286015C2, HB286030C2 2. Configuration and Status register (Address 202H) This register is used for observing the card state. bit7 bit6 bit5 CHGED SIGCHG IOIS8 Note: initial value: 00H Name R/W Function CHGED R This bit indicates that CRDY/-BSY bit on Pin Replacement register is set to "1". When (CARD-> ...
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... This fields are used for the configuration of the plural cards. When host configures the (HOST->) plural cards, written the card’s copy number in this field. In this way, host can perform the card’s master/slave organization. HB286008C2, HB286015C2, HB286030C2 bit4 bit3 bit2 ...
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... HB286008C2, HB286015C2, HB286030C2 CIS informations CIS informations are defined as follows. By reading attribute address from "0000 H", card CIS informations can be confirmed. Address Data 000H 01H CISTPL DEVICE 002H 04H TPL_LINK 004H DFH Device type 006H 4AH EXT Speed ...
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... CISTPL MANFID 05CH 02H TPL_LINK 05EH 04H TPLFID_FUNCTION = 04H 060H 01H Reserved HB286008C2, HB286015C2, HB286030C2 Description of contents Level 1 version/product info Link length is 15h bytes PCMCIA2.0/JEIDA4.1 PCMCIA2.0/JEIDA4.1 ‘ H ’ ‘ I ’ ‘ T ’ ‘ A ’ ‘ C ’ ‘ H ’ ...
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... HB286008C2, HB286015C2, HB286030C2 Address Data 062H 22H CISTPL FUNCE 064H 02H TPL_LINK 066H 01H Disk function extension tuple type Disk interface type 068H 01H Disk interface type 06AH 22H CISTPL FUNCE 06CH 03H TPL_LINK 06EH 02H Disk function extension tuple type Single drive ...
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... Length in 256 bytes pages (LSB) 092H 00H Length in 256 bytes pages (MSB) 094H 20H HB286008C2, HB286015C2, HB286030C2 Description of contents Configuration table entry tuple Link length is 8 bytes Memory mapped I/O configuration Interface byte follows Default entry ...
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... HB286008C2, HB286015C2, HB286030C2 Address Data 096H 1BH CISTPL_CFTABLE ENTRY 098H 06H TPL_LINK 09AH 00H I D Configuration index 09CH 01H 09EH 21H 0A0H B5H X Mantissa 0A2H 1EH X Mantissa 0A4H 4DH X Mantissa ...
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... X Mantissa 0B4H 64H AddrLine 0B6H F0H HB286008C2, HB286015C2, HB286030C2 Description of contents Configuration table entry tuple Link length is 10 bytes Contiguous I/O mapped ATA registers configuration Interface byte follows Default entry Configuration index = Wait not used ...
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... HB286008C2, HB286015C2, HB286030C2 Address Data 0B8H FFH IRQ 0BAH FFH IRQ 0BCH 20H Description of contents IRQ0 IRQ level to be routed recommended ...
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... 0C8H B5H X Mantissa 0CAH 1EH X Mantissa 0CCH 4DH X Mantissa HB286008C2, HB286015C2, HB286030C2 Description of contents Configuration table entry tuple Link length is 6 bytes Contiguous I/O mapped ATA registers configuration Interface byte Default entry Configuration index = Misc info ...
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... HB286008C2, HB286015C2, HB286030C2 Address Data 0CEH 1BH CISTPL_CFTABLE ENTRY 0D0H 0FH TPL_LINK 0D2H C2H I D Configuration INDEX 0D4H 41H interface type 0D6H 99H 0D8H 01H 0DAH 55H X Mantissa ...
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... EEH IRQ level 0EEH 20H HB286008C2, HB286015C2, HB286030C2 Description of contents 1st I/O base address (LSB) 1st I/O base address (MSB) 1st I/O length - 1 2nd I/O base address (LSB) 2nd I/O base address (MSB) 2nd I/O length - Share logic active ...
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... HB286008C2, HB286015C2, HB286030C2 Address Data 0F0H 1BH CISTPL_CFTABLE ENTRY 0F2H 06H TPL_LINK 0F4H 02H I D Configuration index 0F6H 01H 0F8H 21H 0FAH B5H X Mantissa 0FCH 1EH X Mantissa 0FEH 4DH X Mantissa ...
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... X Mantissa 10EH EAH AddrLine 110H 61H LS AS HB286008C2, HB286015C2, HB286030C2 Description of contents Configuration table entry tuple Link length is 15 bytes ATA secondary I/O mapped configuration Interface byte follows default entry Configuration index = Wait not used ...
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... HB286008C2, HB286015C2, HB286030C2 Address Data 112H 70H 114H 01H 116H 07H 118H 76H 11AH 03H 11CH 01H 11EH EEH IRQ level 120H 20H Description of contents CIS function 1st I/O base address (LSB) 1st I/O range address ...
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... Mantissa 130H 4DH X Mantissa 132H 14H CISTPL_NO_LINK 134H 00H 136H FFH CISTPL_END HB286008C2, HB286015C2, HB286030C2 Description of contents Configuration table entry tuple Link length is 6 bytes ATA secondary I/O mapped configuration Interface byte Default entry Configuration index = Misc info ...
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... HB286008C2, HB286015C2, HB286030C2 Task File register specification These registers are used for reading and writing the storage data in this card. These registers are mapped four types by the configuration of INDEX in Configuration Option register. The decoded addresses are shown as follows. Memory map (INDEX = 0) ...
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... HB286008C2, HB286015C2, HB286030C2 A1 A0 Offset -IORD = Data register Error register Sector count register Sector number register Cylinder low register ...
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... HB286008C2, HB286015C2, HB286030C2 Secondary I/O map (INDEX = 3) -REG A10 17H 0 0 17H 0 0 17H 0 0 17H 0 0 17H 0 0 17H 0 0 17H 0 0 17H 0 0 37H 0 0 37H 0 True IDE Mode I/O map -CE2 -CE1 ...
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... Track or Cylinder. If the value of this register is zero, a count of 256 sectors is specified. In plural sector transfer, if not successfully completed, the register contains the number of sectors which need to be transferred in order to complete the request. This register's initial value is "01H". bit7 bit6 bit5 HB286008C2, HB286015C2, HB286030C2 bit8 bit7 bit6 bit5 D0 to D15 ...
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... HB286008C2, HB286015C2, HB286030C2 5. Sector number register: This register contains the starting sector number which is started by following sector transfer command. bit7 bit6 bit5 6. Cylinder low register: This register contains the low 8 bits of the starting cylinder address which is started by following sector transfer command. ...
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... Command register: This register is write only register, and it is used for writing the command at executing the drive operation. The command code written in the command register, after the parameter is written in the Task File during the card is Ready state. HB286008C2, HB286015C2, HB286030C2 bit4 bit3 ...
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... HB286008C2, HB286015C2, HB286030C2 Command Check power mode Execute drive diagnostic Erase sector Format track Identify Drive Idle Idle immediate Initialize drive parameters Read buffer Read multiple Read long sector Read sector Read verify sector Recalibrate Request sense Seek Set features Set multiple mode ...
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... SN: Sector Number register CY: Cylinder register DR: DRV bit of Drive Head register HD: Head Number of Drive Head register LBA: Logical Block Address Mode Supported Y: The register contains a valid parameter for this command. N: The register does not contain a valid parameter for this command. HB286008C2, HB286015C2, HB286030C2 37 ...
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... HB286008C2, HB286015C2, HB286030C2 12. Device control register: This register is write only register, and it is used for controlling the card interrupt request and issuing an ATA soft reset to the card. bit7 bit6 bit5 bit Name SRST (Software ReSeT) 1 nIEN (Interrupt ENable) ...
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... Stand by immediate 22 Translate sector 23 Wear level 24 Write buffer 25 Write long sector 26 Write multiple 27 Write multiple w/o erase 28 Write sector 29 Write sector(s) w/o erase 30 Write verify HB286008C2, HB286015C2, HB286030C2 Code FR SC E5H or 98H — — 90H — — C0H — Y 50H — Y ECH — — ...
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... HB286008C2, HB286015C2, HB286030C2 Note: FR: Feature Register SC: Sector Count register SN: Sector Number register (01H to 20H) CY: Cylinder Low/High register (to) DR: Drive bit of Drive/Head register HD: Head No.( Drive/Head register NH: No. of Heads Y: Set up —: Not set up 1. Check Power Mode (code: E5H or 98H): This command checks the power mode. ...
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... XXXX 62 to 255 0000H HB286008C2, HB286015C2, HB286030C2 Data field type information 2 General configuration bit-significant information 2 Default number of cylinders 2 Reserved 2 Default number of heads 2 Number of unformatted bytes per track 2 Number of unformatted bytes per sector 2 Default number of sectors per track ...
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... HB286008C2, HB286015C2, HB286030C2 6. Idle (code: E3H or 97H): This command causes the PC Card to set BSY, enter the Idle mode, clear BSY and generate an interrupt. If sector count is non-zero, the automatic power down mode is enabled. If the sector count is zero, the automatic power down mode is disabled. ...
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... Write Sector(s) without Erase (code: 38H): This command is similar to the Write Sector(s) command with the exception that an implied erase before write operation is not performed. 30. Write Verify (code: 3CH): This command is similar to the Write Sector(s) command, except each sector is verified immediately after being written. HB286008C2, HB286015C2, HB286030C2 43 ...
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... HB286008C2, HB286015C2, HB286030C2 Sector Transfer Protocol 1. Sector read: 1 sector read procedure after the card configured I/O interface is shown as follows. Set the cylinder low / high register Set the head No.of drive head register Set the sector number register Set "01H" in sector count register Set "20H" in Command register ...
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... Read the status register N Write 256 times the data register Read the status register N Wait the command input A to A10 -CE1 -CE2 -IOWR -IORD D0 to D15 -IREQ HB286008C2, HB286015C2, HB286030C2 Start '58H"? Y (512 bytes) '50H"? Y (1) (2) ( 01H30H 80H 58H ...
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... HB286008C2, HB286015C2, HB286030C2 Absolute Maximum Ratings Parameter All input/output voltages V voltage CC Operating temperature range Storage temperature range Note: 1. Vin, Vout min = –2.0 V for pulse width Recommended Operating Conditions Parameter Operating temperature V voltage CC Capacitance (Ta = 25˚ 1MHz) Parameter Symbol Input capacitance Cin ...
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... Parameter Symbol Sleep/standby I SP1 current Sector read I (DC) CCR current I (Peak) 60 CCR Sector write I (DC) CCW current I (Peak) 60 CCW HB286008C2, HB286015C2, HB286030C2 = 5 V 10%, 3.3 V 5%) CC Min Typ Max — — 1 — — 0.4 V – 0.8 — — Typ Max Min — 0.6 — ...
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... HB286008C2, HB286015C2, HB286030C2 DC Current Waveform (Example of sector read or write: V Sector Read 0 Command write Sector Write 0 Command write 48 I R(DC) CC Time Complete of sector read I W(DC) CC Time Complete of sector write = 25˚ R(Peak W(Peak) CC ...
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... Output enable time (-CE) Output enable time (-OE) Data valid time (A) Address setup time Address hold time -CE setup time -CE hold time Attribute Memory Read Timing A0 to A10, -REG -CE2/-CE1 - D15 HB286008C2, HB286015C2, HB286030C2 = 5 V 10%, 3.3 V 5%) CC 250 ns Symbol Min tCR 250 ta(A) — ta(CE) — ...
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... HB286008C2, HB286015C2, HB286030C2 Attribute Memory Write AC Characteristics Parameter Write cycle time Write pulse time Address setup time Address setup time (-WE) -CE setup time (-WE) Data setup time (-WE) Data hold time Write recover time Output disable time (-WE) Output disable time (-OE) Output enable time (-WE) ...
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... I/O Access Read Timing A0 to A10 -REG -CE2/-CE1 -IORD t suA(IORD) -INPACK t dfIOIS16(ADR) -IOIS16 D0 to D15 HB286008C2, HB286015C2, HB286030C2 Symbol Min td(IORD) — th(IORD) 0 tw(IORD) 165 tsuA(IORD) 70 thA(IORD) 20 tsuCE(IORD) 5 ...
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... HB286008C2, HB286015C2, HB286030C2 I/O Access Write AC Characteristics Parameter Data setup before -IOWR Data hold following -IOWR -IOWR pulse width Address setup before -IOWR Address hold following -IOWR -CE setup before -IOWR -CE hold following -IOWR -REG setup before -IOWR -REG hold following -IOWR -IOIS16 delay falling from address ...
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... Common Memory Access Read AC Characteristics Parameter -CE access time Output disable time (-OE) Address setup time Address hold time -CE setup time -CE hold time Common Access Read Timing A0 to A10 t -REG -CE2/-CE1 - D15 HB286008C2, HB286015C2, HB286030C2 Symbol Min ta(OE) — tdis(OE) — tsu(A) 30 th(A) 20 tsu(CE) 0 th(CE) 20 ...
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... HB286008C2, HB286015C2, HB286030C2 Common Memory Access Write AC Characteristics Parameter Data setup time (-WE) Data hold time Write pulse time Address setup time -CE setup time Write recover time -CE hold following -WE Common Access Write Timing A0 to A10 -REG -CE2/-CE1 - D15 54 Symbol Min ...
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... CE setup before IORD CE hold follwing IORD IOIS16 delay falling from address IOIS16 delay rising from address True IDE Mode access read timing -CE2/-CE1 -IORD -IOIS16 t drlOIS(ADR D15 HB286008C2, HB286015C2, HB286030C2 Symbol Min td(IORD) — th(IORD) 0 tw(IORD) 165 tsuA(IORD) 70 thA(IORD) ...
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... HB286008C2, HB286015C2, HB286030C2 True IDE Mode access write AC characteristics Parameter Data setup before IOWR data hold following IOWR IORD width time address setup before IOWR address hold following IOWR CE setup before IOWR CE hold following IOWR IOIS16 delay falling from address IOIS16 delay rising from address ...
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... Physical Outline 26 pin 1.60 0.05 1.00 0.08 3.30 0.10 12.00 0.10 HB286008C2, HB286015C2, HB286030C2 Upper side 50 pin 1 pin Lower side 1.27 42.80 0.10 41.66 0.13 1.00 0.05 1.27 25 pin 1.00 0.08 3.30 0.10 2.40 0.08 0.60 Unit: mm 3.00 0.08 0.80 0.08 0.08 57 ...
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... HB286008C2, HB286015C2, HB286030C2 When using this document, keep the following in mind: 1. This document may, wholly or partially, be subject to change without notice. 2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi’s permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user’ ...
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... TBD/TBD to 0.6/1.0 mA SP1 I (DC) typ: 40/ 30/50 mA CCR CCR CCW CCR CCW I (DC) typ: 40/70 to 40/60 mA CCW HB286008C2, HB286015C2, HB286030C2 + 0.2 V —/— and V of schmitt trigger IL IH (DC) max: TBD/TBD to 75/100 mA (Peak) max: TBD/TBD to 100/150 mA Drawn by Approved by K. Nakamura T. Totsuka 59 ...