saa4945h NXP Semiconductors, saa4945h Datasheet - Page 10

• Manufacturer Part Number: saa4945h
• Description: Line Memory Noise Reduction Ic Limeric
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 9 Test settings
Note
1. X = don’t care.
SNDA, SNCL
Table 10 Timing characteristics (see Fig.5)
1997 Jun 10
0
X
1
X
t
t
t
t
t
handbook, full pagewidth
cy(SNCL)
su(i)(D)
h(D)
h(Q)
d(D)
(1)
(1)
Serial interface signals
SNERT bus protocol (Synchronous No parity 8-bit receiver and Transmission bus)
SNDA is a bidirectional signal with 8-bit wide data and address (LSB first)
Serial interface signals converted (internally) to system clock domain. To avoid set-up violations these signals are
clocked two times by the system clock before further processing is performed.
Synchronization of serial address (every even byte) and data (every odd byte) by VRST.
LIne MEmory noise Reduction IC
(LIMERIC)
SYMBOL
SNCL
SNDA
(receiver
SNDA
(transmitter
TST2
mode)
mode)
AND
0
1
X
X
VRST (
SNCL cycle time
input set-up time
input hold time
output data hold time
output data delay time
(1)
(1)
TST1
PINS
2, 3
LSB
valid
data
AND
PARAMETER
0
X
X
1
(1)
(1)
Fig.5 Timing diagram of serial interface.
4)
TST0
valid
data
t su(i)(D)
application mode
test mode
test mode
test mode
valid
data
10
t h(Q)
t h(D)
t d(D)
1
90
50
0
valid
data
T cy(SNCL)
MIN.
data
valid
MODE
700
MAX.
valid
data
Preliminary specification
SAA4945H
ns
ns
ns
ns
valid
data
s
MGK173
UNIT