mt8lsdt1664ay-13e Micron Semiconductor Products, mt8lsdt1664ay-13e Datasheet
mt8lsdt1664ay-13e
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mt8lsdt1664ay-13e Summary of contents
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... SYNCHRONOUS DRAM MODULE Features • 168-pin, dual in-line memory module (DIMM) • PC100- and PC133-compliant • Utilizes 125 MHz and 133 MHz SDRAM components • Unbuffered • 128MB (16 Meg x 64) and 256MB (32 Meg x 64) • Single +3.3V power supply • Fully synchronous; all signals registered on positive edge of system clock • ...
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... Table 3: Part Numbers PART NUMBER MT8LSDT1664AG-13E_ MT8LSDT1664AY-13E_ MT8LSDT1664AG-133_ MT8LSDT1664AY-133_ MT8LSDT1664AG-10E_ MT8LSDT1664AY-10E_ MT16LSDT3264AG-13E_ MT16LSDT3264AY-13E_ MT16LSDT3264AG-133_ MT16LSDT3264AY-133_ MT16LSDT3264AG-10E_ MT16LSDT3264AY-10E_ NOTE: The designators for component and PCB revision are the last two characters of each part number Consult factory for cur- rent revision codes. Example: MT16LSDT3264AG-133B1. ...
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... CKO 63 Figure 2: 168-Pin DIMM Pin Locations Front View U1 U2 PIN 1 Back View (Populated only for 256MB module) U11 U12 PIN 168 09005aef80bccbe7 SD8_16C16_32x64AG.fm - Rev. E 12/05 EN 128MB (x64, SR), 256MB (x64, DR) Table 5: PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL V 64 ...
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... BA0 BA1: SDRAMs BA1 NOTE: 1. All resistor values are 10Ω unless otherwise specified. 2. Per industry standard, Micron modules utilize various component speed grades, as referenced in the module part numbering guide at www.micron.com/numberguide. 09005aef80bccbe7 SD8_16C16_32x64AG.fm - Rev. E 12/05 EN 128MB (x64, SR), 256MB (x64, DR) DQMB4 DQM CS# ...
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... DD V SDRAMs U1-U4; U6-U9; U11-U14; U16-U19 SS NOTE: 1. All resistor values are 10Ω unless otherwise specified. 2. Per industry standard, Micron modules utilize various component speed grades, as referenced in the module part numbering guide at www.micron.com/numberguide. 09005aef80bccbe7 SD8_16C16_32x64AG.fm - Rev. E 12/05 EN 128MB (x64, SR), 256MB (x64, DR) S1# DQMB4 DQM CS# ...
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... HIGH). The address inputs also provide the op-code during a MODE REGISTER SET command. Input Serial Clock for Presence-Detect: SCL is used to synchronize the presence-detect data transfer to and from the module. Input Presence-Detect Address Inputs: These pins are used to configure the presence- detect device. ...
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... SD8_16C16_32x64AG.fm - Rev. E 12/05 EN 128MB (x64, SR), 256MB (x64, DR) TYPE Ground. – Not Connected: These pins are not connected on this module. 7 168-PIN SDRAM UDIMM DESCRIPTION Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, 2004 Micron Technology, Inc. All rights reserved. ...
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... SDRAMs with a synchronous interface (all signals are registered on the positive edge of the clock signals CK). Read and write accesses to the SDRAM modules are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the regis- tration of an ACTIVE command, which is then fol- lowed by a READ or WRITE command ...
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Mode register bits M0–M2 specify the burst length, M3 specifies the type of burst (sequential or inter- leaved), M4–M6 specify the CAS latency, M7 and M8 specify the operating mode, M9 specifies the write burst mode, and M10 and M11 ...
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Table 7: Burst Definition ORDER OF ACCESSES WITHIN A BURST ADDRESS BURST STARTING TYPE = LENGTH COLUMN SEQUENTIAL 0 0-1-2 1-2-3 2-3-0 3-0-1-2 A2 ...
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Test modes and reserved states should not be used because unknown operation or incompatibility with future versions may result. Write Burst Mode When the burst length programmed via M0- M2 applies to both read and write bursts; ...
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Commands Table 9, SDRAM Commands and DQMB Operation Truth Table provides a quick reference of available commands. This is followed by a written description of Table 9: SDRAM Commands and DQMB Operation Truth Table CKE is HIGH for all commands ...
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Absolute Maximum Ratings Stresses greater than those listed may cause perma- nent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the opera- ...
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... Continuous burst; READ or WRITE; All device banks active AUTO REFRESH CURRENT CS# = HIGH; CKE = HIGH SELF REFRESH CURRENT: CKE ≤ 0. Value calculated as one module rank in this operating condition, and all otherranks in Power-Down Mode Value calculated reflects all module ranks in this operating condition. 09005aef80bccbe7 SD8_16C16_32x64AG.fm - Rev. E 12/05 EN ...
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Table 14: Capacitance – 128MB PARAMETER Input Capacitance: Command and Address Input Capacitance: CK Input Capacitance: S# Input Capacitance: CKE Input Capacitance: DQMB Input/Output Capacitance: DQ Table 15: Capacitance – 256MB PARAMETER Input Capacitance: Command and Address Input Capacitance: CK ...
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... Table 16: Electrical Characteristics and Recommended AC Operating Conditions Notes: 5–9, 11, 32; notes appear on page 18; module AC timing parameters comply with PC100 and PC133 design specs, based on component parameters AC CHARACTERISTICS PARAMETER Access time from CLK (pos edge Address hold time Address setup time ...
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Table 17: AC Functional Characteristics (Notes 11, 32; notes appear following parameter tables) PARAMETER READ/WRITE command to READ/WRITE command CKE to clock disable or power-down entry mode CKE to clock enable or power-down exit setup ...
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... The value of ule SPDs is calculated from 32. Refer to device data sheet for timing waveforms. 33. Leakage number reflects the worst case leakage t CKS; clock(s) speci- possible through the module pin, not what each memory device contributes plus RP; clock(s) 18 168-PIN SDRAM UDIMM t WR ...
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SPD Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions (as shown in Figure 7, Data Validity, and Figure ...
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Table 18: EEPROM Device Select Code Most significant bit (b7) is sent first SELECT CODE Memory Area Select Code (two arrays) Protection Register Select Code Table 19: EEPROM Operating Modes MODE RW BIT Current Address Read 1 Random Address Read ...
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Table 20: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced DDSPD PARAMETER/CONDITION SUPPLY VOLTAGE INPUT HIGH VOLTAGE: Logic 1; All inputs INPUT LOW VOLTAGE: Logic 0; All inputs OUTPUT LOW VOLTAGE 3mA ...
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... DESCRIPTION 0 Number of Bytes Used by Micron 1 Total Number of SPD Memory Bytes 2 Memory Type 3 Number of Row Addresses 4 Number of Column Addresses 5 Number of Module Ranks 6 Module Data Width 7 Module Data Width (Continued) 8 Module Voltage Interface Levels 9 t SDRAM Cycle Time, CK, (CAS Latency = 3) 10 SDRAM Access From Clock, ...
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... Module Serial Number 99–125 Manufacturer-Specific Data (RSVD) 126 System Frequency 127 Year of Manufacture in BCD NOTE The value of RAS used for the -13E module is calculated from 09005aef80bccbe7 SD8_16C16_32x64AG.fm - Rev. E 12/05 EN 128MB (x64, SR), 256MB (x64, DR) ENTRY(VERSION) 0.8 (-13E/-133 (-10E) 1.5 (-13E/-133) ...
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Figure 11: 168-Pin DIMM Dimensions – 128MB 0.079 (2.00) R (2X 0.118 (3.00) (2X) 0.118 (3.00) TYP 0.250 (6.35) TYP 0.118 (3.00) TYP 2.625 (66.68) PIN 1 (PIN 85 ON BACKSIDE) 0.079 (2.00) R (2X 0.118 ...
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Figure 12: 168-Pin DIMM Dimensions – 256MB 0.079 (2.00 (2X) 0.118 (3.00) (2X) 0.118 (3.00) TYP 0.118 (3.00) TYP 2.625 (66.68) PIN 1 U11 U12 PIN 168 0.079 (2.00) R (2X 0.118 (3.00) (2X) 0.118 ...
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Data Sheet Designation Released (No Mark): This data sheet contains mini- mum and maximum limits specified over the complete power supply and temperature range for production 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, ...