gs8662d08bgd-400i GSI Technology, gs8662d08bgd-400i Datasheet
gs8662d08bgd-400i
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gs8662d08bgd-400i Summary of contents
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... SigmaQuad-II B4RAM is always two address pins less than the advertised index depth (e.g., the has a 1M addressable index). -400 -350 -333 2.5 ns 2.86 ns 3.0 ns 3.3 ns 0.45 ns 0.45 ns 0.45 ns 0.45 ns 1/34 400 MHz–250 MHz TM 1 1.8 V and 1.5 V I/O Bottom View -300 -250 4.0 ns 0.45 ns © 2011, GSI Technology DD ...
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... DDQ V D14 Q14 DD DDQ V Q13 D13 DD DDQ DDQ DDQ REF V D12 Q4 DD DDQ V Q12 D3 DD DDQ V D11 Q11 SS DDQ V D10 Q10 TMS © 2011, GSI Technology TDI ...
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... DDQ DDQ DDQ DDQ DDQ REF DDQ DDQ DDQ TMS © 2011, GSI Technology TDI ...
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... DDQ DDQ DDQ DDQ DDQ REF DDQ DDQ DDQ TMS © 2011, GSI Technology TDI ...
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... DDQ DDQ DDQ DDQ DDQ REF DDQ DDQ DDQ TMS © 2011, GSI Technology TDI ...
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... Active High Input Active Low Input — Input — Input — Output — Input — Input — Output — Input — Input Active Low Output — Output — Supply 1.8 V Nominal Supply 1.5 or 1.8 V Nominal Supply — — — © 2011, GSI Technology ...
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... K K Address BWx Rev: 1.02a 5/2011 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 NOP Read B Write A+1 A+2 A+3 7/34 Read D Write E NOP C+1 C+2 C+3 E E+1 C C+1 C+2 C+3 E E+1 B B+1 B+2 B+3 D D+1 © 2011, GSI Technology D+2 ...
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... Write Enable” and “NBx” may be substituted in all the discussion above. Rev: 1.02a 5/2011 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 NOP Read B Write A+3 8/34 Read D Write E NOP B+1 B+2 B+3 D D+1 © 2011, GSI Technology D+2 ...
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... Data In 0 Don’t Care 0 Data In 0 Don’t Care Byte 2 Byte 1 D9–D17 D0–D8 Written Written Beat 2 Beat 3 9/34 D9–D17 Don’t Care Data In Data In Data In Byte 2 Byte 1 Byte 2 D9–D17 D0–D8 D9–D17 Written Unchanged Written Beat 4 © 2011, GSI Technology ...
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... For simplicity BWn, NWn, K, and C are not shown. Rev: 1.02a 5/2011 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 Bank 1 Bank 10/34 Bank © 2011, GSI Technology ...
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... Rev: 1.02a 5/2011 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 11/34 © 2011, GSI Technology ...
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... Don’t Care Don’t Care Data In Don’t Care Data In Don’t Care Data In Don’t Care Data In Data In Data In Data In Data In Data In Data In Data In Data In D9–D17 Don’t Care Don’t Care Data In Data In © 2011, GSI Technology ...
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... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 D0–D8 Don’t Care Data In Don’t Care Data In D0–D3 Don’t Care Data In Don’t Care Data In 13/34 D4–D7 Don’t Care Don’t Care Data In Data In © 2011, GSI Technology ...
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... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 State Diagram Power-Up READ WRITE WRITE Write Address WRITE D Count = 2 D Count = D Count + 1 Always Write Address 14/34 Write NOP Load New WRITE D Count = 2 D Count = 0 Always DDR Write WRITE D Count = 1 Increment © 2011, GSI Technology ...
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... V +0.5 ( 2.9 V max.) DDQ +/–100 +/–100 125 –55 to 125 Typ. Max. 1.8 1.9 V — DD — 0. followed by signal inputs. The power DD DDQ REF Typ. Max 100 © 2011, GSI Technology Unit Unit Unit C C ...
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... Airflow = 2 m/s 17.349 9.292 Max Units V + 0.3 V DDQ V – 0.1 V REF levels are defined separately for measuring timing Max Units + 200 — – 200 mV REF 5% V (DC) mV REF . REF © 2011, GSI Technology JC (C°/W) 2.310 Notes 1 1 Notes 2,3 2,3 1 ...
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... Test conditions OUT OUT CLK IN AC Test Load Diagram RQ = 250 (HSTL I/ 0.75 V REF 50 DDQ 17/34 20% tKHKH Typ. Max. Unit Conditions 1. V/ns 0. DDQ © 2011, GSI Technology ...
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... V OL DDQ = 1 1.8 V DDQ 18/34 Min. – – –2 uA DDQ Min. Max. Units V /2 – 0. 0.12 V DDQ DDQ V /2 – 0. 0.12 V DDQ DDQ V – 0 DDQ DDQ Vss 0.2 V © 2011, GSI Technology Max Notes ...
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... GSI Technology Notes –40 to 85°C 740 510 510 510 225 ...
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... GSI Technology cycle ...
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... Min 0.4 — 0.4 — 0.4 0.4 — 0.4 — 0.4 0.28 — 0.28 — 0.28 0.28 — 0.28 — 0.28 DD 21/34 -300 -250 Units Max Min Max Min Max — 0.4 — 0.5 — — 0.4 — 0.5 — — 0.3 — 0.35 — — 0.3 — 0.35 — and input clock are stable. © 2011, GSI Technology ...
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... Rev: 1.02a 5/2011 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 22/34 © 2011, GSI Technology ...
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... Rev: 1.02a 5/2011 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 23/34 © 2011, GSI Technology ...
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... RAM’s JTAG Port to another device in the scan chain with as little delay as possible. Rev: 1.02a 5/2011 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 TDO should be left unconnected Description 24/34 . The JTAG output DD © 2011, GSI Technology ...
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... JTAG TAP Block Diagram · · · · · · Boundary Scan Register 0 Bypass Register Instruction Register ID Code Register · · · · Control Signals Test Access Port (TAP) Controller 25/34 · · TDO © 2011, GSI Technology ...
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... Rev: 1.02a 5/2011 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 See BSDL Model 26/34 GSI Technology JEDEC Vendor ID Code © 2011, GSI Technology 0 1 ...
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... JTAG Tap Controller State Diagram 1 1 Select Capture DR 0 Shift Exit1 DR 0 Pause Exit2 Update 27/34 1 Select Capture IR 0 Shift Exit1 IR 0 Pause Exit2 Update © 2011, GSI Technology ...
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... Places the Boundary Scan Register between TDI and TDO. Preloads ID Register and places it between TDI and TDO. Forces all RAM output drivers to High-Z. GSI private instruction. GSI private instruction. GSI private instruction. Places Bypass Register between TDI and TDO. 28/34 Notes © 2011, GSI Technology ...
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... V V –0 –300 100 uA – –1 V – 0.2 V — DD 0.2 V — V – 0.1 V — DD 0.1 V — JTAG Port AC Test Load TDO 50 30pF Distributed Test Jig Capacitance © 2011, GSI Technology ...
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... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 JTAG Port Timing Diagram tTKH tTKH tTKL tTKL tTH tTS tTH tTS tTKQ tTH tTS Min Max Unit — — — — — — 30/34 © 2011, GSI Technology ...
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... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36BD-400/350/333/300/250 BOTTOM VIEW A1 CORNER Ø0. Ø0. Ø0.40~0.60 (165x 1.0 10.0 13±0.05 B 0.20(4x) 31/ 1.0 © 2011, GSI Technology ...
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... SigmaQuad-II SRAM 165-bump BGA 32/34 Speed (MHz) 400 C 350 C 333 C 300 C 250 C 400 I 350 I 333 I 300 I 250 I 400 C 350 C 333 C 300 C 250 C 400 I 350 I 333 I 300 I 250 I 400 C 350 C 333 C 300 C 250 C 400 I 350 I 333 I 300 I 250 I 400 C © 2011, GSI Technology ...
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... GS8662D36BD-400I GS8662D36BD-350I GS8662D36BD-333I GS8662D36BD-300I GS8662D36BD-250I GS8662D08BGD-400 GS8662D08BGD-350 GS8662D08BGD-333 GS8662D08BGD-300 GS8662D08BGD-250 GS8662D08BGD-400I GS8662D08BGD-350I GS8662D08BGD-333I GS8662D08BGD-300I GS8662D08BGD-250I GS8662D09BGD-400 GS8662D09BGD-350 GS8662D09BGD-333 GS8662D09BGD-300 GS8662D09BGD-250 GS8662D09BGD-400I ...
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... Update to MP status • (Rev1.02a: Removed Power-up section and added AN1021 link to Content Power Supplies table) 34/34 Speed T J (MHz) 300 C 250 C 400 I 350 I 333 I 300 I 250 I 400 C 350 C 333 C 300 C 250 C 400 I 350 I 333 I 300 I 250 I Description of changes references) A © 2011, GSI Technology 2 ...