saa5288 NXP Semiconductors, saa5288 Datasheet

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saa5288

Manufacturer Part Number
saa5288
Description
Microcontroller With Full Screen Screen Display
Manufacturer
NXP Semiconductors
Datasheet

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Part Number:
saa5288ZP/014
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U-BLOX
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Preliminary specification
File under Integrated Circuits, IC02
DATA SHEET
SAA5288
TV microcontroller with full screen
On Screen Display (OSD)
INTEGRATED CIRCUITS
1997 Jun 24

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saa5288 Summary of contents

Page 1

... DATA SHEET SAA5288 TV microcontroller with full screen On Screen Display (OSD) Preliminary specification File under Integrated Circuits, IC02 INTEGRATED CIRCUITS 1997 Jun 24 ...

Page 2

... Arabic/English/French 8.5 Thai 8.6 Arabic/Hebrew 9 LIMITING VALUES 10 CHARACTERISTICS 11 CHARACTERISTICS FOR THE I INTERFACE 12 QUALITY SPECIFICATIONS 13 APPLICATION INFORMATION 14 EMC GUIDELINES 15 PACKAGE OUTLINE 16 SOLDERING 16.1 Introduction 16.2 Soldering by dipping or by wave 16.3 Repairing soldered joints 17 DEFINITIONS 18 LIFE SUPPORT APPLICATIONS 19 PURCHASE OF PHILIPS I 2 Preliminary specification SAA5288 2 C-BUS 2 C COMPONENTS ...

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... Stable Display via slave synchronization to Horizontal Sync and Vertical Sync. 2 GENERAL DESCRIPTION The SAA5288 is a microcontroller for use in televisions with an OSD generator compatible with the Economy Teletext/TV microcontroller family (SAA5290, SAA5291, SAA5296 etc.). TV control facilities are provided by an on-chip industry standard 80C51 microcontroller and a 1 kbyte DRAM is included for OSD memory ...

Page 4

... V SSD XTALIN XTALOUT OSCGND OSCILLATOR 256 BYTE 16 KBYTE RAM ROM 2 I C-BUS ADC TIMER/ COUNTER PORT 0 P0.0 to P0.7 Fig.1 Block diagram. 4 Preliminary specification SAA5288 DISPLAY PAGE RAM DISPLAY TIMING TEXT INTERFACE PWM PORT 3 PORT 2 MGL121 P3.0 to P3.7 P2.0 to P2.7 VERSION SOT247 VDS, COR ...

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... XTALIN V SSD 13 40 OSCGND SAA5288 14 39 P0.0 V DDD P0 DDA P0 VSYNC P0 HSYNC P0 VDS SSD 22 31 RGBREF i. P3.4/PWM7 i. COR i. SSD IREF 26 27 FRAME MGL114 Fig.2 Pin configuration. 5 Preliminary specification SAA5288 ...

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... Internally connected; this pin should be connected to digital ground. Internally connected; this pin should be connected to digital ground. Internally connected; this pin should be connected to digital ground. Reference current input for analog current generator, connected to V resistor. 6 Preliminary specification DESCRIPTION SAA5288 via SSA ...

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... P1.0/INT1 is external interrupt 1, can be triggered on the rising/falling edge of pulse. P1.1/T0 is the counter/timer 0. P1.2/INT0 is the external interrupt 0. P1.3/T1 is the counter/timer 1. P1.7/SDA is the serial data port for the I P1.6/SCL is the serial clock input for the I 7 Preliminary specification DESCRIPTION 2 C-bus. 2 C-bus. SAA5288 via DDM ...

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... Byte I C-bus 2 Bit I C-bus 7.2 CHIP MEMORY The SAA5288 does not support the use of off-chip program memory or off-chip data memory. 7.2 DLE AND OWER DOWN MODES Idle and Power-down modes are not supported. Consequently, the respective bits in PCON are not available. ...

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... The output of the PWM is a pulse of period 21.33 s with a pulse HIGH time determined by the binary value of these 6-bits multiplied by 0.33 s. PV5 is the most significant bit. 4 PV4 3 PV3 2 PV2 1 PV1 0 PV0 1997 Jun PV5 PV4 PV3 DESCRIPTION 9 Preliminary specification SAA5288 PV2 PV1 PV0 ...

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... This bit is used with bits TD13 to TD8 in the TDACH register to control the pulse width period TD6 to TD0 These 7-bits extend certain pulses by a further 0.33 s. 1997 Jun TD13 TD12 TD11 DESCRIPTION TD5 TD4 TD3 DESCRIPTION 10 Preliminary specification SAA5288 TD10 TD9 TD8 TD2 TD1 TD0 ...

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... SAD.SAD7 to SAD.SAD4 value. P3.3/ADC3 The output of the comparator is SAD.VHI, and is valid after P3.0/ADC0 1 instruction cycle following the setting of SAD.ST to logic 1. P3.1/ADC1 P3.2/ADC2 P3.0 ST P3.1 MULTIPLEXER P3.2 P3.3 8-BIT DAC CH1, CH0 REF SAD7 to SAD0 Fig.3 SAD block diagram. 11 Preliminary specification SAA5288 C1 1D VH1 REF MGL115 ...

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Microcontroller Interfacing The 80C51 communicates with the peripheral functions using Special Function Registers which are addressed as RAM locations. The registers in the teletext decoder appear as normal SFRs in the microcontroller memory map, but are written to using ...

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DIRECT SYMBOL NAME ADDRESS 7 (HEX) (3) PWM0 Pulse Width D5 PWE Modulator 0 (3) PWM1 Pulse Width D6 PWE Modulator 1 (3) PWM2 Pulse Width D7 PWE Modulator 2 (3) PWM3 Pulse Width DC PWE Modulator 3 (3) PWM4 ...

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DIRECT SYMBOL NAME ADDRESS 7 (HEX) (2)(3) SAD Software ADC E8 EF (MSB) VHI SADB Software ADC 98 9F (2)(3) (LSB) SP Stack Pointer 81 8F (2) TCON Timer/counter 88 TF1 control TDACH TPWM High D3 PWE byte TDACL TPWM ...

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DIRECT SYMBOL NAME ADDRESS 7 (HEX) (3) TXT6 Teletext C6 BKGND Register 6 OUT (3) TXT7 Teletext C7 STATUS Register 7 ROW TOP (3) 2 TXT8 Teletext Register 8 SELECT (3) TXT9 Teletext C9 CURSOR Register 9 ...

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... I Serial Interface Control Register (S1CON) CR2 to CR0 clock rate bits 2 ENSI I C-bus interface enable STA start condition flag STO stop condition flag SI interrupt flag AA assert acknowledge flag 1997 Jun 24 FUNCTION 2 C-bus general call address 16 Preliminary specification SAA5288 ...

Page 17

... ADC input channel selection bits, see Table 11 ST initiate voltage comparison (logic 1); this bit is automatically reset to logic 0 SAD7 to SAD4 4 MSB’s of DAC input value Software ADC Control Register (SADB) SAD3 to SAD0 4 LSB’s of DAC input value 1997 Jun 24 FUNCTION 17 Preliminary specification SAA5288 ...

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... Teletext Register 0 (TXT0) - WRITE only AUTO FRAME FRAME output switched off automatically if any video displayed (logic 1) DISPLAY STATUS display row 24 only (logic 1) ROW ONLY DISABLE FRAME FRAME output always low (logic 1) 1997 Jun 24 FUNCTION 18 Preliminary specification SAA5288 ...

Page 19

... DOUBLE HEIGHT display each character as twice normal height (logic 1) BOX ON 24 enable teletext boxes in memory row 24 (logic 1) BOX ON 1-23 enable teletext boxes in memory rows (logic 1) BOX ON 0 enable teletext boxes in memory row 0 (logic 1) 1997 Jun 24 FUNCTION 19 Preliminary specification SAA5288 ...

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... Teletext Register 17 (TXT17) - Write only FORCE 625 force display to 625-line mode FORCE 525 force display to 525-line mode SCREEN COL defines colour displayed instead of TV picture and black background 1997 Jun 24 FUNCTION 2 2 C-bus (logic 0) or byte I C-bus (logic 1) 20 Preliminary specification SAA5288 ...

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... Fig.4 Display page organisation. 21 Preliminary specification P AGE ATTRIBUTES PAGE ATTRIBUTE FIELD C10 C14 C13 C12 MGL116 SAA5288 ...

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... B7H) are additions to the normal display control characters which allow the background colour to be changed to any colour with a single control character and independently of the foreground colour. The background colour is changed from the position of the background colour control character. 22 Preliminary specification SAA5288 ...

Page 23

... The size implying OSD (BCH to BFH) control characters have been included in this device to allow OSD messages to be generated easily. These characters are described in full later in this document. mosaics character 7FH mosaics character 7FH contiguous separated Fig.5 Contiguous and separated mosaics. 23 Preliminary specification SAA5288 MGL117 ...

Page 24

... TXT5.BKGND IN bits are both set to logic 1, and in OSD boxes. BACKGROUND Preliminary specification EFFECT text mode, black screen text mode, background always black text mode TV mode mixed text and TV mode text mode, TV picture outside text area SAA5288 ...

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... Preliminary specification SAA5288 MGL118 DISPLAY ...

Page 26

... This means that the software can read data from the memory (e.g. TOP table information) without affecting the position of the cursor. 26 Preliminary specification SAA5288 SCREEN SCREEN COL 0 COLOUR 0 transparent ...

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... RGB CVBS VIDEO DECODING TUNER/IF HSYNC, VSYNC SYNC CIRCUITS SAA5288 Fig.7 Timing configuration. 27 Preliminary specification Horizontal timing CRT DISPLAY RGB, VDS FRAME MGL120 SAA5288 ...

Page 28

... On the other field, the display starts on the equivalent line. Table 17 Display vertical position FIRST LINE FOR DISPLAY 625-LINE Preliminary specification SAA5288 HSYNC DISPLAY ( s) 17.2 16.2 15.2 14.2 525-LINE ...

Page 29

... FIELD SCANNING AREA Fig.8 625-line display format. 63. TEXT DISPLAY AREA rows 40 characters TV PICTURE AREA FIELD SCANNING AREA Fig.9 525-line display format. 29 Preliminary specification SAA5288 250 287 312 lines lines lines MGL122 225 243 263 lines lines lines MGL123 ...

Page 30

... The values of C1 and C2 depend on the crystal specification handbook, halfpage 1997 Jun 24 OSCGND (1) C1 OSCIN (1) C2 OSCOUT Fig.10 Oscillator circuit. OSCGND V SS OSCIN external clock OSCOUT not connected Fig.11 Oscillator circuit driven from external source. 30 Preliminary specification MLC110 MLC111 SAA5288 ...

Page 31

... On Screen Display (OSD) 8 CHARACTER SETS The two Pan-European character sets are shown in Figs.13 and 14. The character sets for Russian, Greek/Turkish, Arabic/English/French, Thai and Arabic/Hebrew are available on request. 8.1 Pan-European handbook, full pagewidth 1997 Jun 24 Fig.12 Pan-European geographical coverage. 31 Preliminary specification SAA5288 MGL133 ...

Page 32

... Philips Semiconductors TV microcontroller with full screen On Screen Display (OSD) 1997 Jun 24 32 Preliminary specification SAA5288 pagewidth full handbook, ...

Page 33

... This language is included for backward compatibility with previous generation of Philips teletext decoders. 1997 Jun Fig.14 National option characters. 33 Preliminary specification CHARACTER SAA5288 7D 7E MGL125 ...

Page 34

... Philips Semiconductors TV microcontroller with full screen On Screen Display (OSD) 8.2 Russian handbook, full pagewidth 8.3 Greek/Turkish handbook, full pagewidth 1997 Jun 24 Fig.15 Russian geographical coverage. Fig.16 Greek/Turkish geographical coverage. 34 Preliminary specification SAA5288 MGL128 MGL129 ...

Page 35

... Philips Semiconductors TV microcontroller with full screen On Screen Display (OSD) 8.4 Arabic/English/French handbook, full pagewidth 8.5 Thai handbook, full pagewidth 1997 Jun 24 Fig.17 Arabic/English/French geographical coverage. Fig.18 Thai geographical coverage. 35 Preliminary specification SAA5288 MGL131 MGL132 ...

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... Philips Semiconductors TV microcontroller with full screen On Screen Display (OSD) 8.6 Arabic/Hebrew dbook, full pagewidth 1997 Jun 24 Fig.19 Arabic/Hebrew geographical coverage. 36 Preliminary specification SAA5288 MGL130 ...

Page 37

... C; unless otherwise specified. CONDITIONS Preliminary specification CONDITIONS MIN. MAX. 0.3 +6 +70 55 +125 . DD MIN. TYP. MAX. 4.5 5.0 5 0.3 0.2V 0. +10 4 0.2V DD 0.8V 0.33V DD 4 SAA5288 UNIT UNIT 0 0 ...

Page 38

... 1 0 between 10 and 90 between 90 and 10 0 Preliminary specification SAA5288 TYP. MAX. 0 0.4 V RGBREF RGBREF 150 0 0 ...

Page 39

... LOW-level input voltage IL V HIGH-level input voltage IH C input capacitance I 1997 Jun 24 CONDITIONS P2.7 P3.0 P3.4 TO AND TO 0 0.3 0. 0.3 3 between 3 and 1 V 0.3 0.3 0.3 0.7V 39 Preliminary specification SAA5288 MIN. TYP. MAX. 0. 0.45 50 0. 0. 0.5 400 200 0.2V ...

Page 40

... C-bus specification for the special crystal frequency. 40 Preliminary specification SAA5288 MIN. TYP. MAX 18.5 4.9 35 +25 + C-BUS OUTPUT SPECIFICATION 4 ...

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... Philips Semiconductors TV microcontroller with full screen On Screen Display (OSD) 1997 Jun 24 41 Preliminary specification SAA5288 pagewidth full handbook, ...

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... LTPD = Lot Tolerance Percent Defective. 3. FPM = fraction of devices failing at test condition, in Failures Per Million. 1997 Jun 24 REQUIREMENTS REQUIREMENTS CONDITIONS = 150 stg(max) CONDITIONS 42 Preliminary specification SAA5288 REQUIREMENTS <1000 FPM <2000 FPM <2000 FPM REQUIREMENTS 2000 V 200 V 100 mA, 1.5 V (absolute maximum) DD ...

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... Philips Semiconductors TV microcontroller with full screen On Screen Display (OSD) 13 APPLICATION INFORMATION ndbook, full pagewidth 1997 Jun 24 43 Preliminary specification SAA5288 ...

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... OSCGND should connect only to the crystal load capacitors (and not GND). GND 5 V electrolytic decoupling capacitor (2 F) wire links SM decoupling capacitors (10 to 100 nF) V DDA V DDM V DDD V SSD 44 Preliminary specification SAA5288 under-IC GND plane IC V SSA MGL127 ...

Page 45

... SOT247-1 1997 Jun scale (1) ( 1.3 0.53 0.32 47.9 14.0 0.8 0.40 0.23 47.1 13.7 REFERENCES JEDEC EIAJ 45 Preliminary specification 3.2 15.80 17.15 1.778 15.24 2.8 15.24 15.90 EUROPEAN PROJECTION SAA5288 SOT247 ( max. 0.18 1.73 ISSUE DATE 90-01-22 95-03-11 ...

Page 46

... If the temperature of the soldering iron bit is less than 300 C it may remain in contact for seconds. If the bit temperature is between 300 and 400 C, contact may seconds. 1997 Jun the stg max 46 Preliminary specification SAA5288 ...

Page 47

... Philips. This specification can be ordered using the code 9398 393 40011. 1997 Jun 24 C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 47 Preliminary specification SAA5288 2 C patent to use the 2 C specification defined by ...

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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + ...

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