T
line interface optimized for short loop applications. It integrates
SLCC (Subscriber Line Control Circuit) functionality with a
programmable CODEC and a DC-to-DC controller. In conjunction
with external circuitry, the SLCC supports internal ringing up to
90 V
(CPE). The CODEC can be configured for µ-law/A-law or 16-bit
linear PCM encoding and supports a comprehensive set of
signaling capabilities required to supervise and control both
telephone lines. These include tone generation (including ring
tones), DTMF generation and detection as well as FSK
generation. An on-chip pulse width modulation (PWM) driver
allows the control of DC-to-DC conversion for the line.
Programmable impedance and transhybrid balancing allow for
worldwide deployment. Wideband operation with 16kHz
sampling rate.
APPLICATIONS
Analog Telephone Adapter (ATA)
Voice-enabled DSL Modems
Voice-enabled Cable Modems
Residential VoIP Gateways / Routers
Integrated Access Devices (IAD)
Fiber to the Premise/Home (FTTP/H)
Optical Network Terminals (ONT) for EPON, GPON, GEPON
Set Top Boxes
Wireless Local Loop
he N681387 implements a single channel FXS telephone
PK
(5 REN at 4 kft), ideal for customer premise equipment
Single Programmable Extended CODEC/SLCC
DC / DC
Control
Sigma/delta
Sigma/delta
Line Monitor
Line Feed
DAC
ADC
ADC
DACs
Nuvoton N681387
Loop Closure
Conditioning
Gain Adjust
PCM Filters
Ring Trip
Detection
Detection
Algorithm
DC feed
Subscriber Loop
Control Circuit
Supervision
DC-to-DC
Supervision
Generation
Generation
Generation
FEATURES
Diagnostic
Ringing
Loop
Performs complete BORSCHT functions for a single channel on a
single device
Internal balanced ringing up to 90V
Integrated Power Management
▫
▫
Programmable linefeed characteristics
▫ Ringing frequency, amplitude, cadence
▫ Trapezoidal and Sinusoidal waveforms
▫ Two-wire AC impedance, transhybrid balance
▫ Constant Current feed (20 to 41mA)
▫ Ring trip and loop closure detects
▫ Low power idle state
Programmable signal generation
▫
▫
▫
▫
Loop test and diagnostics support
▫
▫
▫
PCM and SPI bus digital interfaces
▫
On-chip PLL for flexible clocking options including 2MHz
Sampling Rate: 16 kHz / 8 kHz
Small Footprint Packages: LQFP-48, QFN-48
Tone
FSK
Line
Integrated DC-DC controller regulates battery voltage to
minimize power dissipation in all operating modes
Battery voltage switched between up to three external sources
DTMF generation and detection
Enhanced Caller ID (FSK) generation (Type I and Type II)
Tone generation (up to four simultaneous)
G.711 µ-Law/A-Law / 16-bit linear PCM audio
Integrated loopback modes
On-chip temperature sensor
Enhanced GR-909 Support
PCM Master and Slave modes supported
Signaling
Supervision
Generation
Loopback
Detection
Thermal
Control
Control
DTMF
DTMF
Mode
PCM
PLL
SPI
PK
(5REN up to 4kft)
Revision 1.2 - 9/2009
N681387