r8a66597 Renesas Electronics Corporation., r8a66597 Datasheet - Page 23
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r8a66597
Manufacturer Part Number
r8a66597
Description
Assp Usb2.0 2 Port Host/1 Port Peripheral Controller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A66597.pdf
(185 pages)
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2.3.11 Low power sleep mode enabled bit (LPSME)
2.3.12 Hi-Speed operations enabled bit (HSE)
2.3.12.1 Selecting the Host Controller function
2.3.12.2 Selecting the Peripheral Controller function
2.3.13 D+, D- line resistor control bit for Port1 (DRPD)
R e v 1 . 0 1
This controller enters low power sleep mode when the oscillation buffer is stopped ("XCKE=0" setting) and when
"LPSME=1". The standby power can be further reduced compared to when "LPSME=0" and in the oscillation buffer
stopped mode.
The two types of events that help this controller restore to normal clock operating status from the low power sleep
mode, which was caused by "LPSME=1" and "XCKE=0", are given below.
Write "LPSME=1" when "XCKE=1". When writing "LPSME=1", writing "XCKE=0" makes this controller enter low power
sleep mode, and access to the controller is disabled for 10µs. Therefore, exit from low power sleep mode with a
dummy reading from the CPU after at least 10µs have elapsed after writing "XCKE=0". When the controller is shifted to
low power sleep mode, the value in the FIFO buffer is lost. While using the controller with "LPSME=1", read the FIFO
contents or clear the FIFO buffer before writing "XCKE=0".
Hi-Speed operations are enabled for Port1 by writing "1" to this bit". If "HSE=1" written, the controller operates Port1 at
Hi-Speed or Full-Speed according to the reset handshake result.
The settings for the Port1 USB data bus resistor are shown in Table 2.8. Select the USB data bus resistance using the
SYSCFG1 register DRPD bit.
The controller pulls down the Port1 D+ and D- lines if "1" is written to this bit when selecting the Host Controller
function.
Refer to 2.3.5.1.
Write "0" to this bit.
Port1 cannot be used when the Peripheral Controller function is in use.
When selecting the
Peripheral Controller
function
When selecting the
Host Controller
function
Selection (DCFM Bit
Controller Function
Table 2.7 Restoration Event from Low Power Sleep Mode ("LPSME=1" and "XCKE=0")
O c t 1 7 , 2 0 0 8
Setup Value)
DRPD D- Line
0
1
Pull-down Pull-down
p a g e 2 3 o f 1 8 3
Open
Table 2.8 Port1 USB Data Bus Resistance Control
"PCSDIS=0"
"PCSDIS=1"
"PCSDIS=0"
"PCSDIS=1"
Conditions
If writing
If writing
If writing
If writing
D+ Line
Open
(1) RESM interrupt detection if writing "RSME=1"
(2) VBINT interrupt detection if writing "VBSE=1"
(3) CS_N signal assert by dummy reading from CPU
(1) RESM interrupt detection if writing "RSME=1"
(2) VBINT interrupt detection if writing "VBSE=1"
(1) BCHG interrupt detection in the port written as "BCHGE=1"
(2) CS_N signal assert by dummy reading from CPU
(1) BCHG interrupt detection in the port written as "BCHGE=1"
When Port1 is not used
Write to this status during operations as Host
Controller.
Remarks
Restoration Events