200 Minuteman Park, Andover, MA 01810 Ph: 978/623-0009 Fax:978/623-0024
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STS-48/STM-16 SONET/SDH Framer and ATM/POS Mapper
• Provides two SONET/SDH line interface modes of operation:
• Processes any valid combination of SONET/SDH STS-48c/
• Terminates/generates SONET/SDH section, line, and
• Performs full-duplex mapping ATM cells or packets for up to
• Supports full-duplex mapping of ATM cells or packets into
• ATM mapping is compliant with the ATM Forum UNI 3.1 speci-
• POS mapping is compliant with IETF RFC 2615.
• Supports simultaneously ATM, POS, TDM and direct-mapped
• Provides a single 4x622 MHz telecom bus type system
single STS-48/STM-16 or quad STS-12/STM-4s.
AU-4-16c, STS-12c/AU-4-4c, STS-3c/AU-4, or STS-1/AU-3
tributaries within an STS-48/STM-16 or STS-12/STM-4.
optionally path overhead. SONET/SDH processing of all
defined TOH/POH bytes, compliant with Bellcore GR-253 and
ANSI T1.105, and ITU G.751, G.783, G.804.
48 payload tributaries. These tributaries can range in size
from STS-48c/AU-4-16c down to STS-1/AU-3.
DS3 tributaries for ATM over DS3 or packet over DS3 applica-
tions. DS3 tributaries are then mapped into either STS-1s or
STM-1s via AU-3.
fication and ITU-T I.432.1 and I.432.2.
traffic on a per tributary basis.
interface for add/drop of payload tributaries containing TDM
traffic. This interface includes a 144x48 STS-1 level cross-
connect for grooming of TDM tributaries.
Features
S4806CBI Block Diagram
TX_DATA_OUT_[3:0]
TX_CLK_OUT_[1:4]
RX_DATA_IN_[3:0]
RX_CLK_IN_[1:4]
RX_LOSEXT[1:4]
AMCC - Confidential and Proprietary
FRMR
TX
FRMR
RX
TOH DROP
TOH INSERT
MON
TOH
PROC
PTR
PROT TOH GEN
PROT DXC
PROC
PTR
GPIO REG
DXC
PROT FRMR
PTR PROC
• Alternatively, this TDM port can be used to support protection-
• This 4x622MHz APS/TDM drop/add interface supports both
• Built-in 144x48 cross-connect capability in the TX direction.
• Provides a four bit 622 MHz line interface on the SONET/SDH
• Supports independent loop timing in quad STS-12/STM-4 line
• Provides a 100 MHz 32-bit Flexbus-3
• Programmable Utopia/FlexBus-3
• Loopback capability for SONET/SDH, ATM and POS
• Packaged in 624 pin CBGA
• 0.18um CMOS, 1.8V core and 2.5V I/O supply
switching configurations between two OHIO devices or two
fiber optics modules.
synchronous and asynchronous operation.
Supports ring architectures such as add-drop, drop and
continue, and hairpinning, as well as APS.
side for STS-48/STM-16 applications; four serial 622 MHz
signal for STS-12/STM-4 applications
configuration
supports Utopia Level 3 mode for ATM applications; for packet
operation, can be provisionned either in extended Utopia-3
mode or in OIF SPI-3 mode.
operation.
tributaries
SPE/VC
GEN
SEL
POH
MON
DS3
MAP
FR
MICROPROCESSOR I/F
DMAP
DS3
DS3
x48
FR
PM
x48
HDLC
ADVANCED PRODUCT BRIEF
JTAG PORT
ATM
HDLC
RX
Advanced Information - The information contained in this
document is about a product in its definition phase and is sub-
ject to change without notice at any time. All features described
herein are design goals.Contact AMCC for updates to this doc-
ument and the latest product status.
ATM
TX
x48
Product Brief Version 1.3 - April 2001
x48
FIFO
FIFO
TX
RX
x48
x48
TM
Part Number - S4806CBI
addresses for multi-PHY
TX_ERR
TX_EOP
TX_LBYTE[1:0]
TX_SYS_DAT[31:0]
TX_PRTY
TX_SOC/P
STPA
TX_CLK
TX_ADR[5:0]
TX_ENB
TX_CLAV/PA[1:4]
TX_CLK_OUT
RX_SYS_DAT[31:0]
RX_PRTY
SRPA
RX_SOC/P
RX_CLK
RX_ADR[5:0]
RX_ENB
RX_CLAV[1:4]
RX_CLK_OUT
RX_LBYTE[1:0]
RX_EOP
RX_ERR
TM
system interface;
