74HC/HCT240 Philips Semiconductors (Acquired by NXP), 74HC/HCT240 Datasheet
74HC/HCT240
Related parts for 74HC/HCT240
74HC/HCT240 Summary of contents
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... DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT240 Octal buffer/line driver; 3-state; inverting Product specification File under Integrated Circuits, IC06 ...
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... Logic Package Information” See December 1990 GENERAL DESCRIPTION The 74HC/HCT240 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT240 are octal inverting buffer/line drivers with 3-state outputs ...
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... Fig.1 Pin configuration. December 1990 NAME AND FUNCTION output enable input (active LOW) data inputs 3 bus outputs 3 ground (0 V) data inputs 3 bus outputs 3 output enable input (active LOW) positive supply voltage Fig.2 Logic symbol. 3 Product specification 74HC/HCT240 Fig.3 IEC logic symbol. ...
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... Philips Semiconductors Octal buffer/line driver; 3-state; inverting Fig.4 Functional diagram. December 1990 FUNCTION TABLE INPUTS nOE Notes HIGH voltage level L = LOW voltage level X = don’t care Z = high impedance OFF-state 4 Product specification 74HC/HCT240 OUTPUT ...
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... Product specification 74HC/HCT240 . TEST CONDITIONS WAVEFORMS 125 (V) 150 ns 2.0 Fig.5 30 4.5 26 6.0 225 ns 2.0 Fig.6 45 4.5 38 6.0 225 ns 2.0 Fig.6 45 4 2.0 Fig ...
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... amb 74HCT 125 min. typ. max. min. max. min Product specification 74HC/HCT240 . TEST CONDITIONS UNIT V WAVEFORMS CC (V) max 4.5 Fig 4.5 Fig 4.5 Fig 4.5 Fig.5 ...
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... HCT 1 GND Fig.6 Waveforms showing the 3-state enable and disable times. PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines” December 1990 , output ( propagation delays and the output transition Product specification 74HC/HCT240 ...