TSS901EA/883 ATMEL [ATMEL Corporation], TSS901EA/883 Datasheet
TSS901EA/883
Related parts for TSS901EA/883
TSS901EA/883 Summary of contents
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Features • 3 identical bidirectional link channels allowing full duplex communication under selectable transmit rate from 1. 200 Mbit/s in each direction • A COmmunication Memory Interface (COMI) provides autonomous accesses to a communication memory which are controlled ...
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Introduction Rev. C – 24-Aug-01 The TSS901E provides an interface between a Data-Strobe link according to the IEEE Std 1355-1995 specification carrying the simple interprocessor communication proto- (1) col and a data processing node consisting of a CPU and communication ...
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Interfaces TSS901E 3 The TSS901E consists of the following blocks (See Figure 1): • bidirectional link channels, all comprising the DS-link macro cell (DSM), receive and transmit sections (each including FIFOs) and a protocol processing unit (PPU). Each channel allows ...
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Operation Modes Rev. C – 24-Aug-01 According to the different protocol formats expected for the operation of the TSS901E, two major operation modes are implemented into the TSS901E. The operation modes are chosen individually for each link channel by setting ...
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TSS901E Control by Link Wormhole Routing PPU Functional Description TSS901E 5 A feature of the TSS901E is the possibility to control the TSS901E not only via HOCI but via one of the three links. This allows to use the TSS901E ...
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Fault Tolerance Applications Rev. C – 24-Aug-01 The IEEE Std 1355-1995 specifies low level checks as link disconnect detection and parity check at token level. The TSS901E provides, through the Protocol Processing Unit, features to reset a link or all ...
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Register Set Access by HOCI: HOCI data transfer TSS901E 7 This chapter describes the TSS901E registers which can be read or written by the HOCI or via the link (in case the "control by link" is enabled) to control TSS901E ...
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Register Address Map TSS901E status and control registers Port Width / Address (hex ...
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Port Width / Address (hex ...
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Port Width / Address (hex ...
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Port Width / Address (hex ...
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TSS901E GPIO control registers Port Width / Address (hex Rev. C – 24-Aug-01 These registers are only enabled when the TSS901E is configured for "control by link" using the ...
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Signal Description Signal Name HSEL* HRD* HWR* HADR(7:0) HDATA(31:0) HACK HINTR* TSS901EADR(3:0 ) TSS901EID(3:0) TSS901E 13 The Figure below shows the TSS901E (also called SMCS332) embedded in a typical module environment: This section describes the pins of the TSS901E. Groups ...
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Signal Name HOSTBIGE BOOTLINK CMCS(1:0)* CMRD* CMWR* CMADR(15:0) CMDATA(31:0) COCI COCO CAM CPUR* SES(3:0)* LDI1 LSI1 LDO1 LSO1 LEN1 LDI2 LSI2 LDO2 LSO2 LEN2 LDI3 LSI3 LDO3 LSO3 LEN3 TRST* Rev. C – 24-Aug-01 Type Function 1: host I/F Big ...
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Signal Name TCK TMS TDI TDO RESET* CLK CLK10 PLLOUT VCC GND TSS901E 15 Type Function Test Clock. Provides an asynchronous clock for JTAG boundary I scan. I Test Mode Select. Used to control the test state machine. Test Data ...
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Electrical Specifications Absolute Maximum Ratings Supply Voltage I/O Voltage Operating Temperature Range (Ambient) Junction Temperature Storage Temperature Range DC Electrical Characteristics Parameter Operating Voltage Input HIGH Voltage Input LOW Voltage Output HIGH Voltage Output LOW Voltage Output Short circuit current ...
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PLL Filter TSS901E 17 The pin PLLOUT should be connected as shown below 249 ± 5%, ¼1/ 1nF, ± 5%, 200V C2 = 15nF, ± 5%, 200V TSS90E PLLOUT Rev. C – 24-Aug-01 ...
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Timing Parameters Clock Signals 1) CLK period CLK width high CLK width low 1) CLK10 period CLK10 width high CLK10 width low Rev. C – 24-Aug-01 Description 1) Note: Max. 25 MHz Description 1) Note: Typically 10 MHz TSS901E Symbol ...
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Reset RESET setup before CLK high RESET low pulse width Output disable after CLK high Output enable after CLK high CAM, HOSTBIGE, BOOTLINK setup before RESET high TSS901E 19 Description Symbol Min. Max RSTS ...
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Host Read HSEL*, HRD* and TSS901EADR and HADR setup before CLK high HADR, TSS901EADR hold after HSEL*, HRD* high HRD* pulse width high HACK low after HRD*, HSEL* active and TSS901EADR valid HACK high after CLK high HACK disable after ...
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Host Write HSEL*, HWR* and TSS901EADR and HADR setup before CLK high HADR, TSS901EADR hold after HSEL*, HWR* high HWR* pulse width high HACK low after HWR*, HSEL* active and TSS901EADR valid HACK high after HSEL* and HWR* and TSS901EADR ...
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COMI Read CMCS0*, CMCS1* and CMRD* low and CMADR valid after CLK high CMCS0*, CMCS1* or CMRD* high after CLK high CMCS0*, CMCS1*, CMRD*, CMADR pulse width CMDATA setup before CMCS0* or CMCS1* or CMRD* high or new address on ...
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COMI Write CMCS0*, CMCS1* and CMWR* low and CMADR valid after CLK high CMCS0*, CMCS1* or CMWR* high after CLK high CMCS0*, CMCS1*, CMWR* pulse width CMDATA valid after CLK high CMDATA valid before CMCS0* or CMCS1* or CMWR* high ...
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COMI Arbitration COM Interface disable after CLK low COM Interface enable after CLK high COCI setup before CLK low COCO low after CLK low COCO high after CLK high 3) COCO pulse width Rev. C – 24-Aug-01 Description 3) Note: ...
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CPUR, SES, Interrupt CPUR*, SESx*, HINTR* delay after CLK high Links Bit Period LDOx, LSOx output skew Data/Strobe edge separation TSS901E 25 CLK CPUR SESx HINTR Description LSOx LDOx t LOUT LDIx t LDSI LSIx Description t OUTC Symbol Min. ...
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Test Port (JTAG) TCK period TCK width high TCK width low TMS, TDI setup before TCK high TMS, TDI hold after TCK high TDO delay after TCK low TRST* pulse width TSS901E Inputs setup before TCK high TSS901E Inputs hold ...
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Mechanical Data Package Dimensions TSS901E 27 MQFPL 196 Code: FX Date:13/10/00 Rev. C – 24-Aug-01 ...
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Pin Assignment Pin Number 1 VCC 2 GND 3 GND 4 CLK 5 RESET* 6 CLK10 7 HOSTBIGE 8 TCK 9 TMS 10 TDI 11 TRST* 12 TDO 13 VCC 14 GND 15 HSEL* 16 HRD* 17 HWR* 18 HACK ...
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Pin Number 45 HDATA2 46 HDATA3 47 HDATA4 48 HDATA5 49 HDATA6 50 VCC 51 GND 52 HDATA7 53 HDATA8 54 HDATA9 55 HDATA10 56 HDATA11 57 VCC 58 GND 59 HDATA12 60 HDATA13 61 HDATA14 62 HDATA15 63 HDATA16 ...
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... Ordering Information Part-number TSS901EMA-E TSS901EAM 5962-01A1701QXC TSS901EA/883(*) TSS901EASC 5962-01A1701VXC TSS901EASB TSS901EAS/883(*) TSS901EMC-E 5962-01A1701Q9A 5962-01A1701V9A Rev. C – 24-Aug-01 Temp. Range 25°C -55°C +125°C -55°C +125°C -55°C +125°C -55°C +125°C -55°C +125°C -55°C +125°C -55°C +125°C 25° ...
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Atmel Wireless & Microcontrollers Sales Offices France 3, Avenue du Centre 78054 St.-Quentin-en-Yvelines Cedex France Tel: 33130 Fax: 33130 Germany Erfurter Strasse 31 85386 Eching Germany Tel: 49893 Fax: 49893 19 ...