lxt9763 Intel Corporation, lxt9763 Datasheet - Page 64
lxt9763
Manufacturer Part Number
lxt9763
Description
Fast Ethernet 10/100 Hex Transceiver With Full Mii
Manufacturer
Intel Corporation
Datasheet
1.LXT9763.pdf
(74 pages)
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LXT9763 — Fast Ethernet 10/100 Hex Transceiver with Full MII
64
3.15:10
3.9:4
3.3:0
4.15
4.14
4.13
4.12
4.11
4.10
1. RO = Read Only.
1. R/W = Read/Write.
2. Default value of bits 4.8:5 are determined by hardware pins at Reset. Refer to
I/G
a
1
0
Bit
Bit
RO = Read Only.
Table 41. PHY Identification Register 2 (Address 3)
Figure 36. PHY Identifier Bit Mapping
Table 42. Auto Negotiation Advertisement Register (Address 4)
b
2
0
0
15
c
3
0
Reserved
Reserved
Pause
Next Page
Remote Fault
Asymmetric
Pause
PHY ID number
revision number
Manufacturer’s
Manufacturer’s
model number
0
00
Name
0
0
Name
Organizationally Unique Identifier
PHY ID Register #1 (Address 2)
0
The Level One OUI is 00207B hex.
0
0
0
1 = Port has ability to send multiple pages.
0 = Port has no ability to send multiple pages.
Ignore.
1 = Remote fault.
0 = No remote fault.
Ignore.
Pause operation defined in Clause 40 and 27.
1 = Pause operation enabled for full-duplex links.
0 = Pause operation disabled.
0
The PHY identifier composed of bits 19 through 24 of the
OUI.
6 bits containing manufacturer’s part number.
4 bits containing manufacturer’s revision number.
0
0
0
0
0
20
1
0
1
2
Description
0
0
Description
3
1
18 19
0
1
r
B
15
0
s
1
7B
1
PHY ID Register #2 (Address 3)
1
“Reset”
7
1
24
10
0
x
discussion on
9
X
5
Manufacturer’s
Model Number
Type
RO
RO
RO
X
X
1
X
page
X
Type
R/W
R/W
R/W
R/W
R/W
RO
22.
X
4
0
Default
001001
011110
1
XXXX
3
0
3
Revision
Number
Datasheet
0
Default
0
0
0
0
0
0
0
0
0
0
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