lxt972a Intel Corporation, lxt972a Datasheet - Page 30

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lxt972a

Manufacturer Part Number
lxt972a
Description
3.3v Dual-speed Fast Ethernet Transceiver Datasheet
Manufacturer
Intel Corporation
Datasheet

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LXT972A — 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet
30
RXD<3:0>
RXD<3:0>
RX_CLK
RX_CLK
Figure 15. 100BASE-TX Reception with no Errors
Figure 16. 100BASE-TX Reception with Invalid Symbol
RX_DV
RX_ER
RX_DV
RX_ER
As shown in
soon as the LXT972A detects the start of preamble, it transmits a Start-of-Stream Delimiter (SSD,
symbols J and K) to the network. It then encodes and transmits the rest of the packet, including the
balance of the preamble, the SFD, packet data, and CRC.
Once the packet ends, the LXT972A transmits the End-of Stream-Delimiter (ESD, symbols T and
R) and then returns to transmitting Idle symbols. 4B/5B coding is shown in
Figure 15
from the line, it asserts RX_ER as shown in
preamble SFD SFD DA
preamble SFD SFD DA
shows normal reception with no errors. When the LXT972A receives invalid symbols
Figure 13 on page
DA
29, the MAC starts each transmission with a preamble pattern. As
DA
DA
XX
DA
XX
Figure
CRC
XX
16.
XX
CRC
XX
XX
CRC
XX
Table 10 on page
XX
CRC
XX
Datasheet
XX
33.

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