lxt972a Intel Corporation, lxt972a Datasheet - Page 64

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lxt972a

Manufacturer Part Number
lxt972a
Description
3.3v Dual-speed Fast Ethernet Transceiver Datasheet
Manufacturer
Intel Corporation
Datasheet

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LXT972A — 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet
64
8.15
8.14
8.13
8.12
8.11
8.10:0
16.15
16.14
16.13
16.12
16.11
16.10
16.9
16.8
16.7
16.6
16.5
16.4:3
1. RO = Read Only.
1. R/W = Read /Write, LHR = Latches High on Reset
Bit
Bit
Table 45. Auto Negotiation Link Partner Next Page Receive Register (Address 8)
Table 46. Configuration Register (Address 16, Hex 10)
Reserved
Force Link Pass
Transmit Disable
Bypass Scrambler
(100BASE-TX)
Reserved
Jabber
(10BASE-T)
SQE
(10BASE-T)
TP Loopback
(10BASE-T)
CRS Select
(10BASE-T)
Reserved
PRE_EN
Reserved
Next Page
(NP)
Acknowledge
(ACK)
Message Page
(MP)
Acknowledge 2
(ACK2)
Toggle
(T)
Message/
Unformatted Code
Field
Name
Name
Write as zero, ignore on read.
1 = Force Link pass
0 = Normal operation
1 = Disable Twisted Pair transmitter
0 = Normal Operation
1 = Bypass Scrambler and Descrambler
0 = Normal Operation
Ignore
1 = Disable Jabber Correction
0 = Normal operation
1 = Enable Heart Beat
0 = Disable Heart Beat
1 = Disable TP loopback during half-duplex operation
0 = Normal Operation
1 = CRS deassert extends to RX_DV deassert
0 = Normal Operation
Write as zero, ignore on read.
Preamble Enable.
0 = Set RX_DV high coincident with SFD.
1 = Set RX_DV high and RXD = preamble when CRS is asserted.
Write as zero, ignore on read.
1 = Link Partner has additional next pages to send
0 = Link Partner has no additional next pages to send
1 = Link Partner has received Link Code Word from LXT972A
0 = Link Partner has not received Link Code Word from LXT972A
1 = Page sent by the Link Partner is a Message Page
0 = Page sent by the Link Partner is an Unformatted Page
1 = Link Partner complies with the message
0 = Link Partner can not comply with the message
1 = Previous value of the transmitted Link Code Word equalled logic
zero
0 = Previous value of the transmitted Link Code Word equalled logic
one
User definable
Description
Description
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Type
RO
RO
RO
RO
RO
RO
1
1
Datasheet
Default
Default
00
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0

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