cxl1511m Sony Electronics, cxl1511m Datasheet - Page 2
cxl1511m
Manufacturer Part Number
cxl1511m
Description
Ccd Delay Line For Pal
Manufacturer
Sony Electronics
Datasheet
1.CXL1511M.pdf
(14 pages)
- Current page: 2 of 14
- Download datasheet (110Kb)
Recommended Clock Conditions (Ta = 25°C)
• Input clock amplitude
• Clock frequency
• Input clock waveform
Input Signal Amplitude
Block Diagram and Pin Configuration (Top View)
Vsig
Autobias
circuit (C)
24
1
Bias circuit
Selector
350mVp-p (Typ.), 575mVp-p (Max.)
23
2
22
3
f
V
sine wave
CLK
CLK
Bias circuit
1H/2H + D
21
4
D
fsc buffer
0.3Vp-p to 1.0Vp-p (0.5Vp-p Typ.)
4.433619MHz
20
5
19
6
Clamp circuit
– 2 –
circuit (S/H)
Output
18
7
17
8
Autobias
circuit (Y)
16
9
1H
Driver
10
15
1
Timing
PLL
circuit (S/H)
Output
11
14
Driver
2
12
13
CXL1511M
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