75t204 ETC-unknow, 75t204 Datasheet - Page 2

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75t204

Manufacturer Part Number
75t204
Description
Low-power Subscriber Dtmf Receiver
Manufacturer
ETC-unknow
Datasheet

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75T204
5V Low-Power Subscriber
DTMF Receiver
DESCRIPTION
and to provide output timing and decoding.
outputs interface directly to standard CMOS circuitry
and are three-state enabled to facilitate bus-oriented
architectures.
ANALOG IN
This pin accepts the analog input.
biased so that the input signal may be AC coupled.
The input may be DC coupled as long as it does not
exceed the positive supply. Proper input coupling is
illustrated in Figure 1.
The 75T204 is designed to accept sinusoidal input
wave forms but will operate satisfactorily with any
input that has the correct fundamental frequency
with harmonics less then -20 dB below the
fundamental.
CRYSTAL OSCILLATOR
The 75T204 contains an onboard inverter with
sufficient gain to provide oscillation when connected
to a low-cost television “colorburst” crystal.
crystal oscillator is enabled by tying XEN high. The
crystal is connected between XIN and XOUT.
1 Mz 10% resistor is also connected between these
pins. In this mode, ATB is a clock frequency output.
Other 75T204’s (or 75T202's) may use the same
frequency reference by tying their ATB pins to the
ATB of a crystal connected device. XIN and XEN of
the auxiliary devices must then be tied high and low
respectively.
crystal-connected 75T204 (or 75T202) as shown in
Figure 2.
OUTPUTS D1, D2, D4, D8 and EN
Outputs D1, D2, D4, D8 are CMOS push-pull when
enabled
impedance) when disabled by pulling EN low.
These digital outputs provide the hexadecimal code
corresponding to the detected digit.
outputs become valid after a tone pair has been
detected (DV is high) and they are then cleared
when a valid pause is timed.
codes are described in Table 1.
(EN
Ten devices may run off a single
high)
(continued)
and
open
The hexadecimal
circuited
It is internally
The digital
(high
The
The
A
2
DV
DV signals a detection by going high after a valid
tone pair is sensed and decoded at the output pins
D1, D2, D4, and D8. DV remains high until a valid
pause occurs.
N/C PINS
These pins have no internal connection and may be
left floating.
Digit
A
B
C
D
1
2
3
4
5
6
7
8
9
0
#
*
TABLE 1: Output Codes
D8
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
Output Code
D4
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
D2
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
D1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0

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