cx82100 Conexant Systems, Inc., cx82100 Datasheet - Page 197

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cx82100

Manufacturer Part Number
cx82100
Description
Home Network Processor Hnp
Manufacturer
Conexant Systems, Inc.
Datasheet

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11
11.1
Table 11-1. INTC Registers
11.2
11.2.1
101306C
INT_LA
INT_Stat
INT_SetStat
INT_Msk
INT_Mstat
31:0
Bit
Register Label
Type
RW
Interrupt Controller Interface Description
INTC Register Memory Map
INTC Registers
Interrupt Level Assignment Register (INT_LA: 0x00350040)
32’h00000000
Default
Conexant Proprietary and Confidential Information
Interrupt Level Assignment Register
Interrupt Status Register
Interrupt Mask Register
Interrupt Mask Status Register
Interrupt Set Status Register
All peripheral interrupt sources are routed through the Interrupt Controller (INTC) and
reduced to one of two active low inputs to the ARM940T processor, fast interrupt (FIQ#)
or regular interrupt (IRQ#), as selected in the Interrupt Level Assignment Register
(INT_LA). No hardware-assisted priority scheme is implemented in the HNP other than
FIQ# having a higher priority than IRQ#. The system software must implement the
priority scheme for individual interrupts in the FIQ# and IRQ# exception handlers.
INTC registers are identified in Table 11-1.
The INTC receives an interrupt signal from a potential interrupt source and compares it
with the corresponding interrupt level assignment register (INT_LA) to determine if a
fast interrupt (FIQ#) signal or a regular interrupt (IRQ#) signal should be sent to the
ARM940T processor. Setting the interrupt's corresponding bit on the Interrupt Level
Assignment Register to a 1 will cause a FIQ# interrupt, while a 0 will cause an IRQ#
interrupt.
CX82100 Home Network Processor Data Sheet
Int_LA_x
Name
Register Name
Level Assignment Interrupt Control.
0 = The corresponding bit location in the INT_Stat register will cause
1 = The corresponding bit location in the INT_Stat register will cause
an IRQ# interrupt to the INTC if the interrupt has been enabled.
a FIQ# interrupt to the INTC if the interrupt has been enabled.
ASB Address
0x0035004C
0x00350040
0x00350044
0x00350048
0x00350090
Description
Type
WO
RW
RW
RR
RO
Default Value
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
11.2.1
11.2.2
11.2.3
11.2.4
11.2.5
Ref.
11-1

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