cx82100 Conexant Systems, Inc., cx82100 Datasheet - Page 204

• Manufacturer Part Number: cx82100
• Description: Home Network Processor Hnp
• Manufacturer: Conexant Systems, Inc.

12.5.3
12.5.4
12.5.5
12.5.6
12-4
Bit(s)
Bit(s)
Bit(s)
Bit(s)
15:0
15:0
15:0
15:0
Type
Type
RW
RW
Type
Type
RO
RO
Timer 3 Counter Register (TM_Cnt3: 0x00350028)
Timer 4 Counter Register (TM_Cnt4: 0x0035002C)
Timer 1 Limit Register (TM_Lmt1: 0x00350030)
Timer 2 Limit Register (TM_Lmt2: 0x00350034)
Default
Default
16’b0
16’b0
Default
Default
16’b0
16’b0
Conexant Proprietary and Confidential Information
TM_Lmt1
TM_Lmt2
CX82100 Home Network Processor Data Sheet
TM_Cnt3
TM_Cnt4
Name
Name
Name
Name
Timer 3 Current Counter Value.
Timer 3 increments every 1 µ s, from 0 to the Timer 3 limit value, then
resets to 0 and counts again. TM_Cnt3 is reset whenever TM_Lmt3 is
written.
Timer 3 can be used as a Watchdog Timer (see Section 12.2).
Timer 4 Current Counter Value.
Timer 4 increments every 1 µ s, from 0 to the Timer 4 limit value, then
resets to 0 and counts again. TM_Cnt4 is reset whenever TM_Lmt4 is
written.
Timer 1 Limit Value.
When the Timer 1 current count reaches this limit value, the
Int_TIMER1 interrupt bit in the Interrupt Status Register (INT_Stat) is
set. The periodic timer interrupt event rate is = 1 MHz / (TM_Lmt1 +
1). If TM_Lmt1 is set to 0, TM_Cnt1 remains reset. TM_Cnt1 is reset
whenever TM_Lmt1 is written.
Timer 2 Limit Value.
When the Timer 2 current count reaches this limit value, the
Int_TIMER2 interrupt bit in the Interrupt Status Register (INT_Stat) is
set. The periodic timer interrupt event rate is = 1 MHz / (TM_Lmt2 +
1). If TM_Lmt2 is set to 0, TM_Cnt2 remains reset. TM_Cnt2 is reset
whenever TM_Lmt2 is written.
Description
Description
Description
Description
101306C