cx82100 Conexant Systems, Inc., cx82100 Datasheet - Page 75

• Manufacturer Part Number: cx82100
• Description: Home Network Processor Hnp
• Manufacturer: Conexant Systems, Inc.

5
5.1
5.1.1
101306C
Host Interface Description
Master Mode
Host Master Mode Interface Signals
Conexant Proprietary and Confidential Information
The Host Interface operates in Master Mode which allows the HNP to access external
Flash ROM and an optional slave device.
The host interface master mode operates asynchronously and is not referenced to any host
clock input or output.
The Host Master Mode consists of a 21-bit output address bus, 16-bit bidirectional data
bus, read enable output, write enable output, Flash ROM chip enable output, Spare chip
enable output, and Spare interrupt request input.
In master mode, the host interface is selected to drive the host control/address/data
interface when the host ASB slave DSEL is active.
Host Master Mode signals are illustrated in Figure 5-1 and listed in Table 5-1.
Figure 5-1. Host Master Mode Signals
HNP
Host Interface
CX82100 Home Network Processor Data Sheet
HAD[29:16], HC[7:1]
HAD[15:0]
GPIO25
HAD31
HC09
HC08
HC00
HAD[29:16], HC[7:1]
HAD[15:0]
HW R#
HRD#
HCS0#
HCS4#
HIRQ4#
21
16
HAD[29:16], HC[7:1]
HAD[15:0]
HW R#
HRD#
HCS0#
HC[3:1]
HAD[7:0]
HW R#
HRD#
HCS4#
HIRQ4#
21
16
3
8
(UART Example)
A[20:0]
D[15:0]
W R#
RD#
CE#
A[3:1]
D[7:0]
W RUA#
RDUA#
CE#
IRQ#
FLASH ROM
Spare
101306_016
5-1