hd66523 Renesas Electronics Corporation., hd66523 Datasheet

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hd66523

Manufacturer Part Number
hd66523
Description
240-channel Common Driver With Internal Lcd Timing Circuit - Hitachi Semiconductor
Manufacturer
Renesas Electronics Corporation.
Datasheet
Description
The HD66523 is a common driver for liquid crystal dot-matrix graphic display system. This device
incorporates a 240 liquid crystal driver and an oscillator, and generates timing signals (line scanning
signals and frame synchronizing signals) required for the liquid crystal display. It features a new LCD
driving technique for better quality of display and low power dissipation. Combined with the HD66522, a
160-channel column driver with an internal RAM, the HD66523 is optimal for use in displays for
portable information tools.
Features
1102
(240-Channel Common Driver with Internal LCD Timing Circuit)
LCD timing generator: 1/200, 1/240 duty cycle timing are generated internally.
Number of LCD drivers: 240
Power supply voltage: 2.4V to 3.6V
High voltage LCD drive circuit: ±20V
LCD driving technique: Multi-line addressing for low power consumption.
Programmable vertical retrace period: zero to 192 lines
Low power consumption
Internal display off function
On-chip oscillator combined with external resistor and capacitor.
Package: TCP
HD66523
Preliminary

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hd66523 Summary of contents

Page 1

... It features a new LCD driving technique for better quality of display and low power dissipation. Combined with the HD66522, a 160-channel column driver with an internal RAM, the HD66523 is optimal for use in displays for portable information tools. ...

Page 2

... I/O 2 Output scanning function signals during master mode. Input scanning function signals during slave mode This pin shows vertical retrace period. O 240 Select one from among three levels, VRH, VM and VRL. HD66523 1/240 display duty ratio 1103 ...

Page 3

... HD66523 $ $ Table 1 M/ Signal Status $ $ M/ Mode LCD Timing Generator H Master 1/200 or 1/240 duty cycle L Slave Stops Table 2 Retrace period BP4 BP3 BP2 ...

Page 4

... Table 3 Shift Direction SHL DUTY Shift Direction X240 X1 X200 X1 X1 X240 X1 X200 HD66523 1105 ...

Page 5

... R external clock is used. Input external clock to pin CR and open pins C and R (Figure 1). When using the HD66523 during slave mode, the operation clock will not be needed; therefore, connect pin and open pins C and R (Figure 2). ...

Page 6

... Selector: The selector generates signals which select two lines of LCD driver. 5. Decoder: Outputs data according to scanning function signals and data. 6. LCD driver: Outputs one of three levels according to outputs from decoder External clock OPEN OPEN V CC HD66523 CR f 1107 ...

Page 7

... HD66523 Internal Function Description 1. Generation of Signals CL1 and FLM: Signal CL1 shifts the scanning signal of the common driver 50% duty-ratio clock that changes level synchronously with the rising edge of oscillator clock CR. FLM is a clock signal that goes high once every frame. One frame consists of display lines, 240 lines if DUTY is high and 200 lines if DUTY is low, and vertical retrace period which is set with BP4 to BP0 ...

Page 8

... Application Examples Outline of HD66523 System Configuration The HD66523 system configuration is outlined in Figure 5 and 6. Refer to the connection list (Table 4) for connection details. When a signal HD66523 is used to configure a small display (Figure 5) When two HD66523s are used to configure a large display (Figure 6) To HD66522 No.1 COM1 ...

Page 9

... HD66523 Table 4 HD66523 Connection List 1110 ...

Page 10

... Figure 7 System Configuration (1) 240 SEG1 SEG2 LCD SEG159 SEG160 Scanning direction X1 to X240 LCD drivers HD66523 DOC LCD timing generator DISPOFF DUTY SHL M VRH, VM, VRL, VLCD, V VCH, VM, VCL, VLCD DISPOFF Power supply circuit HD66523 BP4 to BP0 5 RESET 1111 ...

Page 11

... Figure 8 System Configuration (2) 1112 240 SEG1 SEG2 LCD SEG159 SEG160 SEG161 SEG162 SEG319 Scanning direction SEG320 X1 to X240 LCD driver HD66523 DOC LCD timing generator DISPOFF DUTY SHL M/S VRH, VM, VRL, VLCD, V VCH, VM, VCL, VLCD DISPOFF Power supply circuit BP4 to BP0 ...

Page 12

... Figure 9 System Configuration (3) 17 LS0 HD66522 HD66522 LS1 LS2 (ID No.0) (ID No.2) SHL 320 COM1 COM2 COM239 COM240 COM241 COM242 COM479 COM480 320 V CC LS0 HD66522 HD66522 LS1 (ID No.1) (ID No.3) LS2 SHL EE HD66523 V CC LS0 LS1 LS2 SHL LCD V CC LS0 LS1 LS2 SHL 1113 ...

Page 13

... HD66523 LCD Drive Output HD66523 outputs one of three levels, VRH, VM and VRL unselected level, VRH is high select level and VRL is low select level. Either VRH or VRL level is selected depending on the number of flames and lines. Output timings are showed in Figure 10 to 12. ...

Page 14

... FLM CL1 FX1,FX0 X10 X11 X12 Figure 12 LCD Drive Output Timing 3’s frame ( VRH VM VRL HD66523 13 14 1115 ...

Page 15

... HD66523 Power Supply Circuit The example of power circuit is shown in Figure 13. When you want to change contrast, both levels, VRH and VRL must be changed. VLCD (variable) VDD (fixed GND DC/DC Converter V EE (variable) Note: VM level must keep following equations; (VRH–VM) = (VM–VRL) (VCH–VM) = (VM–VCL) VCL > ...

Page 16

... Symbol Rating V –0 7.0 CC VRH –0.3 to +25.0 VRL –20.0 to +0.3 VT1 –0 +0.3 CC VT2 V – 0.3 to VLCD + 0 – opr T – 125 stg '2& ',632)) 5(6 SHL, HD66523 Unit Note °C °C , CR, CL1, FLM, FX0 to 1117 ...

Page 17

... HD66523 Electrical Characteristics DC Characteristics (V = 2.4 to 3.6V, GND = 0V, VLCD = 18 to 23V +75°C) Applicable Item Symbol Pins Input high level V IH1 voltage Input low level V IL1 voltage Output high level V OH voltage Output low level V OL voltage Input leakage I IL1 current (1) Input leakage ...

Page 18

... L Duty = t f Figure 14 External Clock HD66523 Measurement Condition Notes Master mode 1 (External clock operation) Slave mode 2 frequency of CL1 C = 100pF 180k f Master mode 3 Master mode 3 Master mode 3 t ...

Page 19

... HD66523 AC Characteristic (V = 2.4 to 3.6V, GND = 0V –20 to 75°C) CC No. Item (1) CL1 high-level width (2) CL1 low-level width (3) CL1 rise time (4) CL1 fall time (5) FLM setup time (6) FLM hold time (7) CL1 delay time (8) FLM delay time Notes: 1. Applies during slave mode 2. Applies during master mode ...

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