alc885-gr Realtek Semiconductor Corporation, alc885-gr Datasheet - Page 88

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alc885-gr

Manufacturer Part Number
alc885-gr
Description
7.1+2 Channel High-performance Hda Codec With Content Protection
Manufacturer
Realtek Semiconductor Corporation
Datasheet
9.2.2.
7.1+2 Channel High-Performance HDA Codec
With Content Protection
Parameter
BCLK Frequency
BCLK Period
BCLK Jitter
BCLK High Pulse Width
BCLK Low Pulse Width
SDO Setup Time at Both Rising
and Falling Edge of BCLK
SDO Hold Time at Both Rising and
Falling Edge of BCLK
SDI Valid Time After Rising Edge
of BCLK (1: 50pF external load)
SDI Flight Time
Link Timing Parameters at the Codec
BCLK
SDO
SDI
Table 91. Link Timing Parameters at the Codec
T_setup
V
V
V
V
V
OH
OL
IH
T
IL
Symbol
Figure 16. Link Signals Timing
T
T
T
T
T
T
T
T
flight
cycle
setup
T_tco
jitter
T_hold
high
hold
low
tco
T_high
T_cycle
Minimum
T_low
(45%)
(45%)
80
18.75
18.75
2.1
2.1
-
-
-
-
-
T_flight
Typical
41.67
24.0
7.5
2.0
-
-
-
-
-
Maximum
(55%)
(55%)
22.91
22.91
2.0
8.0
-
-
-
-
-
ALC885 Series
Datasheet
Units
MHz
(%)
(%)
ns
ns
ns
ns
ns
ns
ns
ns
Rev. 1.1