ov9650 OmniVision Technologies, Inc, ov9650 Datasheet - Page 17

• Manufacturer Part Number: ov9650
• Description: Color Cmos Sxga 1.3 Megapixel Camerachiptm With Omnipixel
• Manufacturer: OmniVision Technologies, Inc

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Version 1.91, January 28, 2005
mni
Table 5
Address
35-36
(Hex)
ision
2A
2B
2C
2D
2E
28
29
2F
30
31
32
33
34
37
38
39
Register
Gr_COM
Device Control Register List (Continued)
GbBIAS
EXHCH
HSYEN
EXHCL
ADVFH
HSYST
ARBLM
ADVFL
RBIAS
ACOM
OFON
Name
HREF
RSVD
CHLF
YAVE
ADC
Default
(Hex)
XX
80
00
00
00
80
00
00
00
08
30
A4
03
04
12
00
00
R/W
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
–
Gb Channel Signal Output Bias (effective only when COM6[0] = 1)
Analog BLC and Regulator Control
Dummy Pixel Insert MSB
Dummy Pixel Insert LSB
8 LSB for dummy pixel insert in horizontal direction
R Channel Signal Output Bias (effective only when COM6[0] = 1)
LSB of insert dummy lines in vertical direction (1 bit equals 1 line)
MSB of insert dummy lines in vertical direction
Y/G Channel Average Value
HSYNC Rising Edge Delay (low 8 bits)
HSYNC Falling Edge Delay (low 8 bits)
HREF Control
Reserved
Bit[7]:
Bit[6:0]: Bias value of 10-bit range
Bit[7:6]: Reserved
Bit[5]:
Bit[4]:
Bit[3:0]: Reserved
Bit[7]:
Bit[6:4]: 3 MSB for dummy pixel insert in horizontal direction
Bit[3:2]: HSYNC falling edge delay 2 MSB
Bit[1:0]: HSYNC rising edge delay 2 MSB
Bit[7]:
Bit[6:0]: Bias value of 10-bit range
Bit[7:6]: HREF edge offset to data output
Bit[5:3]: HREF end 3 LSB (high 8 MSB at register HSTOP)
Bit[2:0]: HREF start 3 LSB (high 8 MSB at register HSTART)
Bit[7:0]: Reserved
Bit[7:0]: Reserved
Bit[7:0]: Reserved
Bit[7:0]: Reserved
Bit[7:4]: Reserved
Bit[3]:
Bit[2:0]: Reserved
Proprietary to OmniVision Technologies
Bias adjustment sign
0:
1:
Bypass Analog BLC
Bypass regulator
Reserved
Bias adjustment sign
0:
1:
Line buffer power down - must be set to "1" before chip
power down
Add bias
Subtract bias
Add bias
Subtract bias
Description
Register Set
17