edd51323dbh-ls Elpida Memory, Inc., edd51323dbh-ls Datasheet - Page 41

• Manufacturer Part Number: edd51323dbh-ls
• Description: 512m Bits Ddr Mobile Ram
• Manufacturer: Elpida Memory, Inc.

A Write Command to the Consecutive Precharge Command Interval (same bank)
Operation by each case of destination bank of the consecutive Precharge command.
1.
2.
WRITE to PRECHARGE Command Interval (same bank)
The minimum interval tWPD is necessary between the write command and the precharge command.
Preliminary Data Sheet E1432E11 (Ver. 1.1)
Command
Bank address
Same
Different
DQS
/CK
DM
DQ
CK
WRIT
t0
WRITE to PRECHARGE Command Interval (same bank) (BL = 4)
in0
Operation
The PRE and PALL command can interrupt a write operation.
To complete a burst write operation, tWPD is required between the write and the precharge
command. Please refer to the following timing chart.
The PRE command does not interrupt a write command.
No interval timing is required between the write and the precharge command.
t1
in1
Last data input
in2
t2
tWPD
NOP
in3
t3
41
tWR
t4
PRE/PALL
tn
EDD51323DBH-LS
tn + 1
NOP
tn + 2