DS26303L-XXX DALLAS [Dallas Semiconductor], DS26303L-XXX Datasheet - Page 51
DS26303L-XXX
Manufacturer Part Number
DS26303L-XXX
Description
3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
Manufacturer
DALLAS [Dallas Semiconductor]
Datasheet
1.DS26303L-XXX.pdf
(101 pages)
- Current page: 51 of 101
- Download datasheet (2Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: Performance-Monitoring Update Status Latched (PMSL). This bit is set when the PMS bit transitions from
0 to 1. A read operation clears this bit.
Bit 2: Bit Error Latched (BEL). This bit is set when a bit error is detected. A read operation clears this bit.
Bit 1: Bit-Error Count Latched (BECL). This bit is set when the BEC bit transitions from 0 to 1. A read operation
clears this bit.
Bit 0: Out-of-Synchronization Latched (OOSL). This bit is set when the OOS bit changes state. A read operation
clears this bit.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 3: Performance-Monitoring Update Status-Interrupt Enable (PMSIE). This bit enables an interrupt if the
PMSL bit is set.
Bit 2: Bit-Error-Interrupt Enable (BEIE). This bit enables an interrupt if the BEL bit is set.
Bit 1: Bit-Error-Count Interrupt Enable (BECIE). This bit enables an interrupt if the BECL bit is set.
Bit 0: Out-of-Synchronization Interrupt Enable (OOSIE). This bit enables an interrupt if the OOSL bit is set.
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
0 = interrupt disabled
1 = interrupt enabled
—
—
7
0
7
0
—
—
6
0
6
0
BSRL
BERT Status Register Latched Register
0Eh
BSRIE
BERT Status Register Interrupt Enable Register
10h
—
—
5
0
5
0
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
51 of 101
—
—
4
0
4
0
PMSIE
PMSL
3
0
3
0
BEIE
BEL
2
0
2
0
BECIE
BECL
1
0
1
0
OOSIE
OOSL
0
0
0
0
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